DAC Switch Timing Calibration for Higher SFDR
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Solution Overview
Problem
Conventional digital-to-analog converters (DACs) face performance limitations due to timing errors among switches, which degrade linearity and dynamic performance, particularly at high frequencies, leading to reduced spurious free dynamic range (SFDR) and accuracy.
Innovation Solution
A calibration system is employed to detect spurious spectral performance parameters in the output of a DAC, generating adjustment signals to correct timing errors by adjusting the switching instants of current-steering cells, thereby improving the linearity and accuracy of the DAC.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional DACs operate at high frequencies, then productivity increases, but timing errors among switches worsen, degrading linearity and dynamic performance
Solution Approach 1:
The patent applies preliminary action by performing calibration of switch timing instants before the DAC operates at high frequencies. The calibration process measures and stores optimal timing values for each switch, which are then used during high-speed operation to compensate for timing errors, enabling both high productivity and maintained timing accuracy
Solution Approach 2:
The patent changes the timing parameter of switch operation by introducing adjustable timing control signals that shift the switching instants of individual switches. By dynamically adjusting these timing parameters based on calibration data, the system compensates for timing errors that would otherwise worsen at high frequencies, resolving the contradiction between speed and precision
2Speed
If switching speed increases to improve dynamic performance, then productivity improves, but spectral harmonics increase due to timing errors
Solution Approach 1:
The patent implements feedback by using a spectrum analyzer to detect spectral harmonics and spurious components in the DAC output, then feeding this information back to adjust the timing control signals. This closed-loop feedback mechanism continuously optimizes switch timing to minimize harmful spectral harmonics even at high switching speeds
Solution Approach 2:
The calibration process performs preliminary measurement and adjustment of switch timing instants before high-speed operation begins. By pre-compensating for timing errors that would generate spectral harmonics, the system enables high switching speeds without the harmful harmonic distortion that would otherwise occur
3Manufacturing precision
If timing calibration is performed to reduce timing errors, then manufacturing precision improves, but device complexity increases due to additional calibration circuitry
Solution Approach 1:
The patent applies self-service by implementing a calibration system that automatically measures timing errors and adjusts switch timing instants without requiring external intervention. The calibration circuitry autonomously performs measurement, calculation, and adjustment, reducing the need for complex external testing equipment and manual calibration procedures
Solution Approach 2:
The patent discards the need for complex external calibration equipment by integrating the calibration functionality directly into the DAC system. The calibration circuitry recovers and utilizes existing DAC components (switches, current sources, output circuitry) for the calibration process, eliminating the need for separate dedicated calibration hardware and reducing overall system complexity
Data Source
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AI summary
An apparatus for calibration of a signal converter is disclosed. This apparatus includes a first digital-to-analog converter ("DAC") (510) and a calibration system (520) coupled to an output port of the first DAC (510). The calibration system includes a second DAC (602, 612). The calibration system (520) is configured to provide an adjustment signal responsive to a spurious spectral performance parameter in an output of the first DAC (510). The spurious spectral performance parameter is sensitive to a timing error associated with the first DAC (510). The calibration system (510) is coupled to provide the adjustment signal to the first DAC (510) to correct the timing error of the first DAC (510).