Adjustable-Resolution DAC Switching for Higher Output Levels
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Solution Overview
Problem
Current digital to analog converters (DACs), particularly 1 and 1.5 bit DACs, face challenges in reducing noise and achieving higher output resolution, as they often operate with limited discrete output levels and are not optimized for both 1 bit and 1.5 bit digital signal conversions.
Innovation Solution
The proposed DAC design incorporates multiple switching devices and a switch control module that configures currents and resistances based on binary bits, allowing for the connection, disconnection, and adjustment of tap currents and sink currents to nodes, enabling 1.5 bit operation with reduced noise and increased output resolution by utilizing finite impulse response (FIR) taps and varying resistances based on digital signal inputs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional 1 bit DAC operation is used, then the device complexity is low, but the output resolution is limited
Solution Approach 1:
The patent implements dynamic switching between 1 bit and 1.5 bit operation modes through control logic that adjusts the switching device configurations based on the digital input signal characteristics. This allows the DAC to adapt its resolution dynamically, providing higher output resolution when 1.5 bit operation is enabled while maintaining the ability to operate in simpler 1 bit mode when needed.
Solution Approach 2:
The patent designs a universal DAC architecture that can perform both 1 bit and 1.5 bit digital-to-analog conversion functions using the same hardware components. The switching devices and control logic enable the system to handle different input formats and operate in multiple modes, making the device versatile without requiring separate dedicated circuits for each operation type.
2Manufacturing precision
If 1.5 bit operation is implemented, then the output resolution increases, but the noise increases
Solution Approach 1:
The patent converts the potentially harmful effect of increased noise in 1.5 bit operation into a beneficial outcome by using noise shaping techniques and optimized switching sequences. The control logic is designed to distribute switching events in a manner that pushes quantization noise out of the audio band, effectively converting the noise issue into an acceptable level of background noise while maintaining the higher output resolution benefit.
3Manufacturing precision
If multiple switching devices are used to achieve 1.5 bit operation, then the output resolution increases, but the device complexity increases
Solution Approach 1:
The patent segments the DAC functionality into distinct switching device groups that can be independently controlled. By dividing the conversion process into manageable segments with dedicated switching devices for different current sources, the design achieves 1.5 bit resolution while keeping each segment relatively simple and modular, making the overall complexity manageable through systematic organization.
4Manufacturing precision
If the DAC is optimized for 1.5 bit operation, then the output resolution increases, but the adaptability to different signal types decreases
Solution Approach 1:
The patent implements dynamic mode switching capability that allows the DAC to adapt between 1 bit and 1.5 bit operation based on the input signal characteristics. The control logic detects the signal type and automatically configures the switching devices appropriately, ensuring optimal output resolution for the given signal while maintaining full adaptability to different digital signal formats and sources.
Data Source
AI summary
A digital to analog converter (DAC) includes: first and second nodes; a first switching device; a second switching device; and a switch control module. The switch control module selectively configures the first and second switching devices such that: in a first configuration, the first switching device connects a first current to the first node and the second switching device connects a second current to the second node; in a second configuration, the first switching device connects the first current to the second node and the second switching device connects the second current to the first node; and in a third configuration, the first and second switching devices disconnect the first current and the second current from the first and second nodes.