Independent DAC Synchronization With Modular Phase Detection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing method of synchronizing multiple digital-to-analog converters using a common phase detector is inflexible and requires additional routing traces, making it difficult to add extra channels without redesigning the phase detector circuit.

Innovation Solution

Implementing independent digital-to-analog converters with their own clock modulators and phase detectors, using a system reference clock to align and synchronize the clocks, allowing for modular and flexible channel additions without re-designing the phase detector.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a common phase detector is used to synchronize multiple DACs, then synchronization is achieved, but routing complexity increases and flexibility decreases

Engineering Contradiction:
ImprovesynchronizationVSAvoidrouting complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the single common phase detector into multiple individual phase detectors, with each DAC having its own dedicated phase detector. This segmentation eliminates the need for complex routing traces connecting all DACs to a central phase detector, as each DAC only needs to route signals to its own local phase detector, thereby reducing routing complexity while maintaining synchronization capability.

Inventive Principle:
Principle #1Segmentation

2Reliability

If a common phase detector is used to synchronize multiple DACs, then synchronization is achieved, but adaptability decreases when adding channels

Engineering Contradiction:
ImprovesynchronizationVSAvoidflexibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

By assigning dedicated phase detectors to each DAC, the system becomes modular. When additional DAC channels are needed, the designer can simply add more DAC-Phase Detector pairs without modifying the existing phase detector circuitry or routing structure, thereby maintaining high adaptability and flexibility for system expansion.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each DAC-Phase Detector pair functions independently and can be replicated to create additional channels. The standardized interface and independent operation allow the same hardware configuration to serve multiple functions and channels uniformly, enhancing the system's versatility and ease of expansion.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If connections to common phase detector circuit are required for each DAC, then synchronization is achieved, but device complexity increases

Engineering Contradiction:
ImprovesynchronizationVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The circuit is segmented into independent DAC-Phase Detector units distributed throughout the device. Each unit operates autonomously with local phase detection, eliminating the need for a centralized phase detector that would require extensive interconnections. This distribution of circuit functions reduces overall circuit complexity and improves modularity.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9847787B1Independent digital-to-analog converter synchronization
Publication Date: 2017.12.19 TEKTRONIX INC
  • US9847787B1 patent drawing
  • US9847787B1 patent drawing
  • US9847787B1 patent drawing

AI summary

A device includes at least two digital-to-analog converters, each digital-to-analog converter having a digital-to-analog converter clock modulator, a system reference clock modulator, and a phase detector to track the phases of the clock and the system reference clock. A method of calibrating a phase detector includes providing a pulse waveform, aligning a phase of a digital-to-analog clock to a phase of an internal system reference clock, aligning a phase of a modulated system reference clock with a phase of a modulated, divided, digital-to-analog clock, storing the aligned phase of the modulated system reference clock as a calibration value, synchronizing the digital-to-analog converters and adjusting the phase of the digital-to-analog converters to a center of a desired phase, and storing the aligned phase of the digital-to-analog converters as a calibration value.