Differential DAC Tail-Current Control for Compact High-Gradation Displays
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Solution Overview
Problem
Existing digital-to-analog converters face challenges in reducing chip size and manufacturing costs while maintaining output accuracy as the number of reference voltages increases, leading to increased wiring area and switch elements, and differential amplifiers with variable tail currents result in significant output errors.
Innovation Solution
A digital-to-analog converter design that includes a differential amplifier with individually controlled tail currents and a decoder, allowing for increased voltage levels with a reduced number of differential pairs, and a tail current control circuit to adjust current ratios based on digital data, minimizing output errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of reference voltages is increased to increase the number of gradations, then the number of colors and brightness levels can be increased, but the wiring area and number of switch elements in the decoder increase accordingly, leading to increased chip size and manufacturing cost
Solution Approach 1:
The patent changes the operational parameters of the differential amplifier by controlling tail current ratios to enable a single amplifier to output multiple voltage levels (2K levels) that would traditionally require multiple reference voltages. This parameter control approach allows the system to achieve high gradation capability without increasing the number of reference voltage lines or decoder switch elements, thereby resolving the contradiction between increased adaptability and reduced chip area
Solution Approach 2:
The differential amplifier is designed to perform multiple functions by varying tail current ratios, enabling it to generate multiple output voltage levels (Vout1, Vout2, ..., Vout2K) from a single amplifier circuit. This multi-functionality eliminates the need for multiple dedicated reference voltages and reduces the complexity of the decoder, achieving both high gradation capability and compact chip size
2Adaptability or versatility
If the number of differential pairs is increased to increase the number of voltage levels, then the number of output voltage levels can be increased, but the area of the digital-to-analog converter increases significantly
Solution Approach 1:
The patent utilizes parameter changes in tail current ratios to enable a fixed number of differential pairs (2K pairs) to generate a variable number of output voltage levels (2K levels). By dynamically adjusting the tail current ratios based on digital input data, the system achieves high voltage level resolution without proportionally increasing the number of differential pairs or converter area, thus resolving the contradiction between adaptability and area
Solution Approach 2:
The system introduces dynamic control of tail current ratios that vary with digital input data, allowing the differential amplifier to adaptively generate different output voltage levels. This dynamic parameter adjustment enables the converter to achieve high resolution (2K voltage levels) with a fixed, compact structure, resolving the contradiction between increasing voltage levels and maintaining small converter area
3Area of stationary object
If the tail current ratios are varied to increase voltage levels with fewer differential pairs, then the area is reduced, but output errors increase due to varying current ratios
Solution Approach 1:
The patent incorporates feedback mechanisms where the output voltage is monitored and used to adjust the tail current ratios to compensate for errors. By implementing feedback control, the system maintains high output accuracy despite varying tail current ratios, thus resolving the contradiction between reduced area (achieved through variable current ratios) and maintained measurement precision (output accuracy)
Data Source
AI summary
The disclosure includes: a differential amplifier, and a first decoder assigning and supplying a first or second voltage to each of a plurality of input terminals based on (K+1) bits of digital data. The differential amplifier includes 2K differential pairs each driven by a tail current received individually, and a tail current control circuit supplying first to 2Kth tail currents to the 2K differential pairs and controlling first to 2Kth current ratios for the first to 2Kth tail currents based on the digital data. The tail current control circuit has a basic configuration that sets each of the first to 2Kth current ratios to a maximum value, a minimum value, or an intermediate value among three predetermined values, and increases one of the maximum and minimum values and decreases the other for the current ratio of the tail currents supplied to two predetermined differential pairs.