Hybrid-Rate DAC Interface Using Thermometer-Coded MSBs

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Solution Overview

Problem

High-speed digital to analog converters (DACs) have large interfaces that consume significant power and occupy large areas due to the high number of interface lines required for transmitting digital signals to analog sections.

Innovation Solution

Implementing thermometer coding for most significant bits (MSB) and reducing the frequency of transmission for less significant bits (LSB) to minimize the number of interface lines, using parallel encoding and serialization to match the channel frequency while reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high-speed digital to analog converters use large interfaces to transmit digital signals to analog sections, then signal transmission quality is maintained, but power consumption increases and substrate area is occupied

Engineering Contradiction:
Improvesignal transmission qualityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The digital input bits are segmented into two portions: first portion (MSBs) transmitted at full channel frequency N, and second portion (LSBs) transmitted at reduced frequency N/M. This segmentation allows differential treatment of bit significance, reducing overall interface line count while maintaining signal quality for critical MSBs

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The transmission frequency parameter is changed for different bit portions. The second portion of input bits is transmitted at frequency N/M (where M>1) instead of the full channel frequency N, directly reducing the number of interface lines required while adapting to the lower significance of these bits

Inventive Principle:
Principle #35Parameter changes

2Reliability

If high-speed digital to analog converters use large interfaces to transmit digital signals to analog sections, then signal transmission quality is maintained, but substrate area increases

Engineering Contradiction:
Improvesignal transmission qualityVSAvoidsubstrate area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The digital input bits are segmented into two portions: first portion (MSBs) transmitted at full channel frequency N, and second portion (LSBs) transmitted at reduced frequency N/M. This segmentation allows differential treatment of bit significance, reducing overall interface line count while maintaining signal quality for critical MSBs

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The transmission frequency parameter is changed for different bit portions. The second portion of input bits is transmitted at frequency N/M (where M>1) instead of the full channel frequency N, directly reducing the number of interface lines required while adapting to the lower significance of these bits

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If all input bits are transmitted at full channel frequency, then signal accuracy is maintained, but the number of interface lines increases

Engineering Contradiction:
Improvesignal accuracyVSAvoidnumber of interface lines
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The digital input bits are segmented into two portions: first portion (MSBs) transmitted at full channel frequency N, and second portion (LSBs) transmitted at reduced frequency N/M. This segmentation allows differential treatment of bit significance, reducing overall interface line count while maintaining signal quality for critical MSBs

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The transmission frequency parameter is changed for different bit portions. The second portion of input bits is transmitted at frequency N/M (where M>1) instead of the full channel frequency N, directly reducing the number of interface lines required while adapting to the lower significance of these bits

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12375102B2Hybrid rate interface to reduce power consumption and area in high-speed DACs and digital transmitters
Publication Date: 2025.07.29 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US12375102B2 patent drawing
  • US12375102B2 patent drawing
  • US12375102B2 patent drawing

AI summary

An system includes a port to receive a number of bits at a first frequency. One or more cells generate a signal for a channel with a channel frequency that is N times greater than the first frequency. The cells transmit at a second frequency that is M times greater than the first frequency but is smaller than the channel frequency. Interface links are coupled between a portion of the input bits of the port and the one or more cells and the portion of the input bits is encoded by thermometer coded T bits such that each one of the T bits is encoded by M repeated parallel bits having a value of a respective T bit. Each interface link includes M interface lines between each T bit and each first cell, and M is smaller than N to reduce the number of interface lines for the T bits.