DAC Reference Voltage Averaging for Uniform Display Driving
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Solution Overview
Problem
Current digital-to-analog converter circuits for display devices face challenges in reducing chip size and ensuring high-speed voltage changes, particularly with increased load capacitance and shorter driving periods, leading to image degradation due to uneven luminance and decreased charging percentages.
Innovation Solution
A digital-to-analog converter circuit with a reference voltage generation circuit, first and second decoders, and an amplifier circuit that generates output voltages by averaging and amplifying selection voltages with predetermined weighting ratios, allowing for reduced reference voltages and improved change speed of output voltages across gradation levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the number of reference voltages generated in the reference voltage generation circuit is increased, then the number of gradations (the number of colors) of the luminance level to be expressed can be increased, but the chip size (manufacturing cost) of the data driver increases
Solution Approach 1:
The patent divides the reference voltage generation into two separate circuits: a first reference voltage generation circuit that generates a first reference voltage, and a second reference voltage generation circuit that generates a second reference voltage. This segmentation allows the system to achieve multiple gradations without requiring all reference voltages to be generated in a single circuit, thereby reducing the chip size of each individual circuit while maintaining the total number of available gradations.
2Area of stationary object
If the number of reference voltages is reduced, then the chip size is reduced, but the change speed of output voltages becomes uneven across gradation levels, leading to image degradation
Solution Approach 1:
The patent applies local quality by having the first decoder select from the first reference voltage group and the second decoder select from the second reference voltage group based on different bit groups of the input signal. This allows different parts of the voltage selection process to operate independently with optimized reference voltage sets, ensuring uniform change speed across all gradation levels while maintaining a reduced total number of reference voltages.
Data Source
AI summary
The present invention includes: a first decoder that outputs mutually different two voltages as first and second selection voltages based on a first bit group of a digital data signal in a first selection state, and outputs one or both of the two voltages as the first and the second selection voltages in a second selection state; a second decoder that outputs mutually different two voltages as third and fourth selection voltages based on a second bit group of the digital data signal in the first selection state and outputs one voltage based on the second bit group as the third and the fourth selection voltages in the second selection state; and an amplifier circuit that averages a combination of the first and the second selection voltages or the third and the fourth selection voltages with predetermined weighting ratios and outputs the averaged voltage.