DAG Switching Fabric for Deadlock-Free Routing
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Solution Overview
Problem
Conventional 2D matrix switching fabrics can experience deadlocks due to packet collisions and routing loops, requiring additional buffers and control logic to prevent such issues.
Innovation Solution
The design of a switching fabric using directed acyclic graphs (DAGs) to ensure a deadlock-free property, where each integrated circuit is mapped onto a separate DAG network, and multiple DAGs are combined to form a fully connected switching fabric with multiplexers and demultiplexers for routing selection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional 2D matrix switching fabric is used, then routing flexibility is improved, but deadlock risk increases
Solution Approach 1:
The switching fabric is divided into multiple independent DAG sub-graphs (e.g., first DAG network, second DAG network, third DAG network, fourth DAG network). Each sub-graph handles specific routing functions, and packets are routed through these segmented networks in a way that prevents circular dependencies and deadlocks while maintaining routing flexibility through the combined connectivity of all sub-graphs.
2Reliability
If buffers and control logic are added to prevent deadlocks, then reliability is improved, but device complexity increases
Solution Approach 1:
The DAG-based routing structure inherently prevents deadlocks through its acyclic nature, eliminating the need for external deadlock prevention mechanisms. The routing algorithm naturally progresses packets through the DAG sub-graphs in a deadlock-free manner, making the system self-regulating without requiring additional complex control logic or buffering mechanisms.
3Adaptability or versatility
If multiple DAG sub-graphs are combined, then network connectivity is improved, but routing path restriction increases
Solution Approach 1:
The switching fabric integrates multiple DAG sub-graphs that collectively provide universal routing capability. Each DAG sub-graph contributes specific routing functions, and together they enable packets to reach any destination from any source while maintaining the deadlock-free property. The multiplexer and demultiplexer components enable seamless switching between different DAG sub-graphs based on routing requirements.
Data Source
AI summary
A system, including at least one central processing unit, at least one memory unit, and a plurality of integrated circuits that form a switching fabric configured to propagate data packets between the at least one central processing unit and the at least one memory unit, wherein the switching fabric is constructed using at least two directed acyclic graph (DAG) networks.


