Dam Structure Around Through Electrodes in 3D Memory Stacks
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Solution Overview
Problem
The increasing complexity and miniaturization of integrated circuit devices with memory devices require advanced semiconductor structures that support high integration and electrical performance, particularly in 3-dimensional nonvolatile memory devices with multi-stack structures.
Innovation Solution
A semiconductor device with a dam structure is developed, featuring a substrate with a cell array and extension area, including through electrodes, gate electrodes, insulating layers, and mold layers, along with a dam structure comprising insulating layers with protrusions that surround the through electrode area, enhancing electrical connectivity and isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory devices are miniaturized and highly integrated to increase capacity, then integration density improves, but structural complexity and manufacturing difficulty increase
Solution Approach 1:
The device is divided into distinct functional regions: a cell array area containing memory cells with gate electrodes and channel structures, and an extension area containing through electrodes for peripheral connections. This segmentation allows independent optimization of each region, enabling high integration in the cell area while providing simplified access points in the extension area, thus resolving the contradiction between high capacity and manageable complexity
Solution Approach 2:
The patent transitions from planar 2D integration to 3D vertical stacking by introducing through electrodes that extend vertically through multiple layers and stacks. This dimensional change allows electrical connections to be established in the vertical dimension rather than requiring extensive lateral routing, thereby increasing memory capacity without proportionally increasing lateral structural complexity
2Adaptability or versatility
If through electrodes are added to extend area for peripheral connections, then electrical connectivity improves, but isolation and structural integrity become more difficult to maintain
Solution Approach 1:
A dam structure comprising a dam insulating layer, inner insulating layer, and outer insulating layer is introduced as an intermediary element surrounding the through electrode area. This dam structure acts as a barrier that electrically isolates the through electrodes from adjacent memory stacks while mechanically supporting the structure, thereby maintaining both electrical connectivity and structural integrity simultaneously
Solution Approach 2:
The dam structure applies localized isolation properties specifically around the through electrode area where peripheral connections are made, while the rest of the device maintains its memory storage functionality. The inner and outer insulating layers provide different levels of isolation at different locations, allowing optimized electrical connectivity in the extension area without compromising the reliability of the cell array area
Data Source
AI summary
A semiconductor device includes a memory stack on a substrate, the memory stack including gate electrodes, insulating layers and mold layers, the mold layers being disposed at the same levels as the gate electrodes in a through electrode area, a channel structure extending vertically through the gate electrodes in a cell array area, and a dam structure disposed between the isolation insulating layers and surrounding the through electrode area in a top view. The dam structure includes a dam insulating layer having a dam shape, an inner insulating layer inside the dam insulating layer, and an outer insulating layer outside the dam insulating layer. The inner insulating layer includes first protrusions protruding in a horizontal direction, and the outer insulating layer includes second protrusions protruding in the horizontal direction.