Etch Stop Layer Structure for Damascene Interconnection Alignment

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Solution Overview

Problem

As semiconductor technologies advance to smaller feature sizes, such as 20 nm or less, issues like misalignments and damage to conductive features arise during the damascene process for forming multilayer copper interconnections, which are not adequately addressed by existing methods.

Innovation Solution

A method involving multiple etch stop layers and a specific etching process with a solution that simultaneously removes the patterned mask layer and forms a protective layer over the conductive feature, preventing damage during trench formation, is employed to enhance the precision and reliability of conductive feature creation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a damascene process is used to form multilayer copper interconnections, then vertical interconnection vias and horizontal interconnection metal lines can be formed, but misalignments and damage to already formed conductive features occur at advanced technology nodes

Engineering Contradiction:
Improvealignment precisionVSAvoidconductive feature integrity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

A protective layer is formed over the underlying conductive feature before trench formation begins. This preliminary protective action prevents damage to the conductive feature during subsequent etching and manufacturing processes, addressing the reliability issue while maintaining precision requirements

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protective layer acts as an intermediary between the etching process and the underlying conductive feature. It mediates the interaction by providing a sacrificial barrier that protects the conductive feature from direct exposure to harsh etching conditions, thereby preventing damage while allowing the trench formation to proceed

Inventive Principle:
Principle #24Intermediary (Mediator)

2Length of moving object

If feature sizes are reduced to 20 nm or less, then higher integration density is achieved, but tolerance for misalignments and damage decreases

Engineering Contradiction:
Improvefeature sizeVSAvoidalignment tolerance
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

The protective layer is formed in advance before any trench formation or etching processes. This preliminary action ensures that when feature sizes are reduced to 20 nm or less, the conductive features are already protected, maintaining manufacturing precision even as tolerances become tighter

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protective layer provides beforehand cushioning or buffering protection for the conductive features. This cushioning effect absorbs the impact of potential misalignments and process variations that become more critical at smaller feature sizes, thereby maintaining the required manufacturing precision

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Reliability

If multiple etch stop layers are used to protect conductive features, then damage during trench formation is minimized, but process complexity increases

Engineering Contradiction:
Improveconductive feature protectionVSAvoidetch stop layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The protective function is extracted from the complex multilayer etch stop structure and consolidated into a single dedicated protective layer. This simplifies the overall structure while maintaining the reliability benefit of protecting conductive features during trench formation

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The protective layer serves multiple functions: it protects underlying conductive features during etching, acts as a barrier against contamination, and provides a planar surface for subsequent processing. This multi-functionality reduces the need for separate specialized layers, thereby reducing overall process complexity while maintaining protection reliability

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves the accuracy and minimizes damage to underlying conductive features, enabling more precise and reliable formation of integrated circuit structures at advanced technology nodes.

Implementation Method 1

a first etch stop layer on the first dielectric material layer, wherein the first etch stop layer is formed of a high-k dielectric material

Methodology Applied
Scientific EffectSelective etching:

Data Source

PatentUS9627215B1Structure and method for interconnection
Publication Date: 2017.04.18 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9627215B1 patent drawing
  • US9627215B1 patent drawing
  • US9627215B1 patent drawing

AI summary

A method includes providing a substrate having a first conductive feature in a first dielectric material layer; forming a first etch stop layer on the first dielectric material layer, wherein the first etch stop layer is formed of a high-k dielectric material; forming a second etch stop layer on the first etch stop layer; forming a second dielectric material layer on the second etch stop layer; forming a pattered mask layer on the second dielectric material layer; forming a first trench in the second dielectric material layer and the second etch stop layer; removing a portion of the first etch stop layer through the first trench to thereby form a second trench, wherein removing the portion of the first etch stop layer includes applying a solution to the portion of the first etch stop layer; and forming a second conductive feature in the second trench.