Damascene Structure Low-k Damage Reduction
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Solution Overview
Problem
Low-k dielectric materials in damascene structures are susceptible to damage during processing steps such as etching, wet-cleaning, and chemical mechanical planarization, leading to an increase in the dielectric constant and degradation of integrated circuit performance.
Innovation Solution
A method involving the use of a sacrificial dielectric material and barrier/capping layers, where a sacrificial dielectric material is deposited over a base layer, and after filling with conductive material, it is removed from trench areas, allowing ultra low-k dielectric materials to fill these areas, with optional passivation layers like cobalt or manganese oxide to enhance copper electromigration resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional damascene processing steps (etching, wet-cleaning, CMP) are performed on low-k dielectric materials, then the damascene structure can be formed, but the low-k materials suffer damage and their dielectric constant increases
Solution Approach 1:
The patent segments the dielectric structure into multiple functional layers: a sacrificial dielectric layer (first dielectric layer) and a low-k dielectric layer (second dielectric layer). The sacrificial layer is specifically designed to be removed after copper filling, while the low-k layer remains intact. This segmentation allows the low-k material to avoid direct exposure to damaging processing steps, thereby maintaining its dielectric constant close to bulk values while still enabling damascene structure formation.
Solution Approach 2:
The patent applies preliminary protective action by depositing the low-k dielectric layer over the sacrificial dielectric layer before copper filling. This preliminary placement of the low-k material in a protected position (covered by the sacrificial layer during critical processing steps) prevents damage before it can occur. The sacrificial layer acts as a protective barrier during etching, cleaning, and CMP operations.
2Reliability
If copper is filled into damascene features, then conductive interconnects are formed, but copper migration into surrounding layers may occur
Solution Approach 1:
The patent introduces a barrier layer as an intermediary between the copper fill and the surrounding dielectric layers. This barrier layer specifically prevents copper migration into the low-k dielectric material and other surrounding layers, while still allowing the copper to form continuous conductive interconnects. The barrier layer acts as a mediator that blocks the harmful copper migration pathway without interfering with the desired electrical conductivity function.
3Productivity
If multiple processing steps are performed to form the damascene structure, then the interconnect pattern is created, but the low-k materials are exposed to damaging processes
Solution Approach 1:
The patent extracts the sacrificial dielectric layer from the final structure after it has served its protective purpose. By removing the sacrificial layer after copper filling but before final assembly, the patent eliminates the need for the low-k dielectric material to withstand damaging processing steps. The sacrificial layer is taken out after performing its function of protecting the low-k material during critical processing, thereby resolving the contradiction between productivity and material protection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This process minimizes low-k damage, maintaining the dielectric constant close to bulk values and improving electromigration resistance and overall device performance by protecting ultra low-k dielectric materials from damaging processes.
Implementation Method 1
a copper-manganese (CuMn) alloy may be further deposited onto the Ta/TaN barrier layer to improve electrical properties of the circuit device, such as electromigration resistance, while also serves as a seed layer for the subsequent copper deposition. In one example, the copper-manganese (CuMn) alloy may be treated with a thermal treatment process to form a self-forming manganese oxide (MnOx) layer, thereby enhancing passivation of copper.
Data Source
AI summary
Embodiments described herein generally provide methods for reducing undesired low-k damages during a damascene process using a sacrificial dielectric material and optionally a barrier/capping layer. In one embodiment, a damascene structure is formed through a sacrificial dielectric material deposited over a dielectric base layer. The damascene structure is filled with a suitable metal such as copper. The sacrificial dielectric material filled in trench areas between the copper damascene is then removed, followed by a barrier/cap layer which conformally or selectively covers exposed surfaces of the copper damascene structure. Ultra low-k dielectric materials may then fill the trench areas that were previously filled with sacrificial dielectric material. The invention prevents the ultra low-k material between the metal lines from exposing to various damaging processes during a damascene process such as etching, stripping, wet cleaning, pre-metal cleaning or CMP process.