Damascene Via-Trench Patterning With Etch Stop Layer

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Solution Overview

Problem

The scaling down of semiconductor devices poses challenges in achieving improved quality, yield, performance, and reliability while reducing complexity, particularly in forming via and trench openings during the damascene etching process.

Innovation Solution

A method for fabricating semiconductor devices using a photomask with a translucent layer and an opaque layer, where the translucent layer includes a mask opening of via feature exposing the mask substrate, and the opaque layer includes a mask opening of trench feature exposing the translucent layer and the mask substrate. This method allows for the formation of via and trench openings in a single step damascene etching process, reducing process complexity and alleviating the loading effect.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional multi-step etching process is used to form via and trench openings, then each opening can be formed with adequate precision, but the process complexity increases and loading effect occurs

Engineering Contradiction:

Improveprecision of via and trench openingsVSAvoidprocess complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent combines the formation of via openings and trench openings into a single damascene etching process by using a photomask with a translucent layer and an opaque layer. The translucent layer allows etching of via openings while the opaque layer prevents etching in trench regions during the same process step, eliminating the need for separate etching steps and reducing process complexity.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The photomask is segmented into two functional layers: a translucent layer that permits etching in via regions and an opaque layer that blocks etching in trench regions. This segmentation allows selective etching of different structures (via vs. trench) within a single etching process, maintaining precision while reducing overall process steps.

Inventive Principle:

Principle #1Segmentation

2Manufacturing precision

If multiple etching steps are performed for via and trench openings, then each structure can be optimized independently, but the loading effect increases and productivity decreases

Engineering Contradiction:

Improveoptimization of via and trench structuresVSAvoidfabrication efficiency

Core Design Contradiction:

Manufacturing precisionVSProductivity

Solution Approach 1:

The patent merges via opening formation and trench opening formation into one simultaneous etching process. The photomask design with translucent and opaque layers enables both structures to be created in parallel during a single etching step, eliminating sequential processing delays and improving productivity without sacrificing structural optimization.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The etching process continues uniformly across the substrate in a single operation, with the photomask continuously protecting trench regions while allowing etching of via regions. This continuous etching action eliminates idle time between separate etching steps and maintains high productivity while achieving precise structure formation.

Inventive Principle:

Principle #20Continuity of useful action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method reduces process complexity and improves the reliability and quality of semiconductor devices by allowing the formation of via and trench openings in a single step, thereby alleviating the loading effect and enhancing the precision of the semiconductor device fabrication.

Implementation Method 1

patterning the pre-process mask layer using the photomask to form a patterned mask layer including a mask region corresponding to the opaque layer, a trench region corresponding to the translucent layer, and a via hole corresponding to the mask opening of via feature

Methodology Applied

Scientific EffectPhotolithography: Photopolymerisation

Implementation Method 2

performing a damascene etching process to form a via opening in the first dielectric layer and a trench opening in the second dielectric layer

Methodology Applied

Scientific EffectEtching:

Data Source

PatentUS20250029871A1Method for fabricating semiconductor device with damascene structure by using etch stop layer

Publication Date: 2025.01.23 NAN YA TECH

AI summary

A method for fabricating a semiconductor device includes: providing a photomask including an opaque layer on a mask substrate and surrounding a translucent layer on the mask substrate; forming a pre-process mask layer on a device stack; patterning the pre-process mask layer using the photomask to form a patterned mask layer including a mask region corresponding to the opaque layer, a trench region corresponding to the translucent layer, and a via hole corresponding to the mask opening of via feature; performing a damascene etching process to form a via opening and a trench opening in the device stack. The device stack includes a first dielectric layer on a substrate, a first etch stop layer on the first dielectric layer, and a second dielectric layer on the first etch stop layer. The damascene etching process forms the trench opening having a bottom on the first etch stop layer.