Delay Tolerant Asynchronous Interface DANI for Clock Domain Crossing

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Solution Overview

Problem

The complexity of interconnect networks in integrated circuits with multiple clock domains makes it challenging to provide a reliable communications interface, as the number of control signal traversals grows exponentially, leading to difficulties in meeting timing constraints and ensuring signal integrity.

Innovation Solution

A delay-tolerant asynchronous interface (DANI) is implemented using source and destination wrappers with asynchronous first-in, first-out queues and token-based flow control, allowing for independent clock domains and relative timing constraints to manage signal paths, ensuring reliable data transmission across different clock frequencies and phases.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If asynchronous interconnect networks are used to decouple clock-independent modules, then reliability is improved by simplifying clock-domain crossing timing, but device complexity grows exponentially instead of linearly

Engineering Contradiction:
ImprovereliabilityVSAvoidcomplexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system is divided into independent clock domains with local synchronization, where each domain operates autonomously. The asynchronous interconnect is segmented into controlled interfaces (wrappers) that manage clock-domain crossings independently, preventing complexity from propagating throughout the entire system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Asynchronous FIFO queues and wrapper interfaces act as intermediaries between different clock domains. These mediators buffer and synchronize data transfer between independent clock domains, eliminating the need for complex global timing coordination while maintaining reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If the number of independent control network elements is increased to implement the interconnect network, then adaptability is improved, but device complexity grows exponentially

Engineering Contradiction:
ImproveadaptabilityVSAvoidcomplexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The system changes the timing parameters and clock frequency relationships between different domains, allowing each domain to operate at optimal speeds independently. This parameter-based adaptation enables versatility without requiring complex control logic, as timing adjustments replace structural complexity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8826058B1Delay tolerant asynchronous interface (DANI)
Publication Date: 2014.09.02 BLENDICS
  • US8826058B1 patent drawing
  • US8826058B1 patent drawing
  • US8826058B1 patent drawing

AI summary

A Delay-tolerant Asynchronous Interface (DANI) is typically used to make the clock domains for reusable silicon intellectual property (IP) cores completely independent of each other. In fact, a DANI-wrapped IP core usually appears to its environment as if it were clockless. This property is necessary to address the variability in data transmission-time between source and destination. This variability is a result of increased lack of predictability in today's leading-edge manufacturing processes. A DANI wrapper can be applied to the IP core that is the source of data to be transmitted or it can be applied to the IP core that is the destination of that data. The transmission time over the route between source and destination may vary more than a single clock period.