Dynamic Acceleration Platform for Heterogeneous Hardware Scheduling

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Solution Overview

Problem

Existing high-performance computing (HPC) systems face challenges in efficiently distributing computational work among multiple processing units within a single hardware platform due to dynamic workloads and varying hardware configurations, leading to suboptimal resource utilization and limited flexibility in software development and hardware maintenance.

Innovation Solution

The Dynamic Acceleration using Specialized Hardware (DASH) platform identifies platform-independent instructions and determines scheduling criteria to select the most suitable processing unit for task execution, converting these instructions into platform-dependent format for optimized performance across heterogeneous hardware configurations, enabling efficient use of specialized hardware resources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If specialized processing units (GPU, FPGA) are used to improve computational performance, then performance per watt and per dollar increases, but hardware flexibility decreases

Engineering Contradiction:

Improvecomputational performanceVSAvoidhardware flexibility

Core Design Contradiction:

ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent implements a universal instruction set architecture that enables a single hardware platform to execute multiple types of processing units (CPU, GPU, FPGA) through a common instruction format. This allows the system to maintain hardware flexibility while achieving specialized computational performance, as the same hardware can adapt to different processing needs through software-based instruction translation rather than requiring dedicated hardware for each processing type.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent introduces an intermediary translation layer that converts platform-independent instructions into platform-specific instructions for different processing units. This intermediary mechanism enables flexible hardware to access specialized computational capabilities without requiring direct hardware-specific instruction sets, thus maintaining adaptability while achieving high performance for specific computational tasks.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If heterogeneous processing units are deployed to provide specialized computing capabilities, then computational performance improves, but system complexity increases

Engineering Contradiction:

Improvecomputational performanceVSAvoidsystem complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the instruction set into platform-independent high-level instructions and platform-specific low-level instructions. This segmentation allows the system to manage heterogeneous processing units through a unified abstraction layer, reducing the complexity of directly managing multiple hardware types while still benefiting from their specialized capabilities. The high-level instructions provide a simple interface, while the translation to low-level instructions handles the hardware-specific details.

Inventive Principle:

Principle #1Segmentation

3Productivity

If platform-specific instructions are used for each processing unit, then execution efficiency improves, but software portability decreases

Engineering Contradiction:

Improveexecution efficiencyVSAvoidsoftware portability

Core Design Contradiction:

ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent creates a universal instruction set that can be executed across multiple types of processing units (CPU, GPU, FPGA) through a common instruction format. This universal approach maintains software portability while achieving execution efficiency on each platform through automated instruction translation and optimization, eliminating the need for separate platform-specific software versions.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent employs parameter changes in the instruction format to adapt the same high-level instructions to different hardware platforms. By modifying translation parameters and optimization settings based on the target platform's characteristics, the system achieves platform-specific optimization without changing the fundamental instruction structure, thus maintaining portability while improving execution efficiency.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS10942716B1Dynamic computational acceleration using a heterogeneous hardware infrastructure

Publication Date: 2021.03.09 ARCHITECTURE TECH CORP

AI summary

An example method includes, during execution of a software application in a computing system comprising a plurality of processing units, identifying platform-independent instructions that are configured to perform at least one computational task, wherein the plurality of processing units comprises a heterogeneous group, and wherein the platform-independent instructions have a format that is not specific to any particular processing unit in the plurality of processing units, determining one or more scheduling criteria that are associated with the platform-independent instructions, and selecting, from the heterogeneous group of processing units and based on the scheduling criteria, a processing unit to perform the at least one computational task. The example method further includes converting the platform-independent instructions into platform-dependent instructions, wherein the platform-dependent instructions have a format that is specific to the selected processing unit, and executing, by the selected processing unit, the platform-dependent instructions to perform the at least one computational task.