Data Access Formatter Bit-Patterned Media Alignment

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Solution Overview

Problem

The existing data access mechanisms in bit-patterned media storage devices face challenges in efficiently managing data access signals and fragment descriptors, leading to potential interference and inefficiencies in data transfer due to the reliance on internal signals for data access initiation and timing synchronization.

Innovation Solution

A data formatting method that includes outputting a fragment descriptor for data access and a signal indicating its availability, independent of the data access initiation, along with careful placement and sizing of intersector gaps, write splices, and overhead fields to ensure reliable and efficient data transfer, while using a Long-Latency Interface protocol for synchronization between the formatter and channel.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the formatter uses internally generated signals for data access initiation, then timing control is simplified, but the channel cannot independently optimize its data access timing

Engineering Contradiction:
Improvesignal generation complexityVSAvoidchannel timing independence
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent separates the data access information transfer from the data access initiation signal. The formatter outputs fragment descriptors (data access information) through a dedicated interface, while the channel generates its own data access initiation signals independently. This segmentation allows each component to operate optimally without interfering with the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary interface protocol that mediates between the formatter and channel. This interface transfers fragment descriptors from the formatter to the channel, allowing the channel to receive data access information without being controlled by the formatter's internal signals. The intermediary enables independent operation while maintaining coordination.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the formatter provides data access information and initiation signal together, then synchronization is simplified, but the channel loses ability to independently derive timing signals

Engineering Contradiction:
Improvesynchronization reliabilityVSAvoidchannel timing flexibility
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent implements preliminary action by having the formatter output fragment descriptors in advance of the actual data access operation. The channel receives and processes this data access information beforehand, allowing it to independently prepare and generate timing signals without relying on simultaneous signal provision from the formatter.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If consistent track layouts are enforced across zones, then manufacturing complexity increases, but data access reliability improves

Engineering Contradiction:
Improvedata access reliabilityVSAvoidmanufacturing flexibility
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies parameter changes by allowing track layout parameters (such as track pitch and sector positioning) to vary across different zones of the storage medium. The formatter adapts its operation to these varying parameters, adjusting data access information generation to match the specific zone characteristics, thereby maintaining reliability without requiring uniform manufacturing constraints.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8972631B2Data access formatter
Publication Date: 2015.03.03 SEAGATE TECH LLC
  • US8972631B2 patent drawing
  • US8972631B2 patent drawing
  • US8972631B2 patent drawing

AI summary

The defined architecture allows for format-efficient data storage on bit-patterned media, while allowing for typical variations in the drive, such as reader to writer gap variations. The defined BPM architecture relaxes some timing requirements on real-time signaling from the formatter to the channel, while enabling bit-accurate alignment between data accesses and the media.