Data Access Interface Unit for SSD Clock Signal Generation
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Solution Overview
Problem
Conventional data storage systems face challenges in providing reliable, cost-effective, and high-performance data access interfaces for single-port SSDs, particularly in scenarios where controller failures or distributor malfunctions occur, leading to access latency and increased costs.
Innovation Solution
A data access interface unit is introduced, comprising a physical storage device controller, a selector, and a clock generation circuit, which facilitates communication between storage virtualization controllers and physical storage devices, enabling seamless data access and clock signal provision even in the event of controller failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If distributors are used to route clock signals from controllers to multiple SSDs, then system reliability is improved, but device complexity and cost increase
Solution Approach 1:
The patent extracts the clock signal generation function from the controllers and places dedicated clock generation circuits within each data access interface unit. This eliminates the need for distributors to route clock signals, thereby reducing device complexity and cost while maintaining system reliability through localized clock generation.
Solution Approach 2:
The patent segments the clock signal provision function from the controllers and distributes dedicated clock generation circuits to individual data access interface units. This segmentation allows each interface unit to independently generate clock signals, eliminating the need for complex distributor routing while improving system reliability.
2Ease of operation
If distributors are used to provide clock signals to multiple SSDs, then clock signal distribution is achieved, but overall system cost increases
Solution Approach 1:
The patent extracts the clock signal generation function from the controllers and relocates it to dedicated circuits within each data access interface unit. This eliminates the need for expensive distributors, thereby reducing system cost while maintaining ease of clock signal distribution through localized generation.
Solution Approach 2:
The patent replaces expensive distributors with inexpensive dedicated clock generation circuits integrated into each data access interface unit. These localized circuits provide a cost-effective solution for clock signal distribution without requiring complex external routing infrastructure.
3Ease of operation
If distributors are used for clock signal routing, then signal distribution is enabled, but routing configuration complexity increases
Solution Approach 1:
The patent extracts the clock signal routing function by eliminating distributors entirely. Each data access interface unit generates its own clock signals locally, which eliminates the need for complex routing configurations and simplifies the overall system architecture.
Solution Approach 2:
The patent implements self-service by enabling each data access interface unit to independently generate its own clock signals through dedicated circuits. This eliminates the need for external distributors and complex routing configurations, as each unit is self-sufficient in providing clock signals to its connected SSD.
Data Source
AI summary
The present invention discloses a data access interface unit comprising: a physical storage device controller for receiving a first control signal from a first storage virtualization controller, and accordingly determining the first storage virtualization controller as the primary controller, and generating a first selection signal; a selector for receiving the first selection signal, and accordingly selecting data and signals from the first storage virtualization controller; and a clock generation circuit for providing a dedicated clock signal to the physical storage device, where when the physical storage device controller receives a re-set signal from a second storage virtualization controller, the physical storage device controller determines the second storage virtualization controller as the new primary controller, and accordingly generates a second selection signal so as to control the selector to select data and signals from the second storage virtualization controller.