Data Bus Signal Conditioning and Level Shifting Across Voltage Domains
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Solution Overview
Problem
Existing data bus systems, such as those compliant with USB standards, face challenges in maintaining effective communication over longer distances and varying power requirements, particularly as device feature sizes decrease and voltage domains change, due to limitations in repeaters that require complex state machines and higher power consumption.
Innovation Solution
A circuit comprising signal conditioner, level shifter, and state detector and controller circuitry, which includes a finite state machine to detect data rates and control the operation of signal conditioner and level shifter circuitry, enabling edge boosting and voltage level translation between devices operating at different supply and ground levels without the complexity of packet repeaters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If traditional repeaters are used to extend communication distance, then communication distance is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent extracts the essential signal conditioning functions (edge boosting, voltage level translation) from the complex repeater architecture, implementing only the necessary components to extend communication distance without the full repeater complexity
Solution Approach 2:
The intermediary circuit acts as a mediator between devices at different voltage domains and communication distances, providing signal conditioning and level shifting to enable extended communication without requiring full repeater functionality at each endpoint
2Length of stationary object
If traditional repeaters are used to extend communication distance, then communication distance is improved, but power consumption increases
Solution Approach 1:
The patent extracts only the essential signal conditioning functions needed for extended communication, eliminating the power-consuming components and operations of traditional repeaters while maintaining the ability to extend communication distance
Solution Approach 2:
The patent changes the operational parameters by using voltage domain translation and selective signal conditioning only when needed for extended communication, rather than continuously operating high-power repeater functionality
3Adaptability or versatility
If voltage level translation is implemented for devices at different supply levels, then compatibility across voltage domains is improved, but device complexity increases
Solution Approach 1:
The level shifter circuit acts as an intermediary between devices operating at different voltage domains, providing transparent voltage translation without requiring complex protocol handling or state machine logic
Solution Approach 2:
The patent replaces complex mechanical or logical control systems with direct electrical voltage domain translation circuitry, simplifying the implementation of multi-voltage domain compatibility
4Reliability
If signal conditioning is applied to maintain data integrity over longer distances, then data integrity is improved, but power consumption increases
Solution Approach 1:
The patent extracts and implements only the specific signal conditioning functions (edge boosting) necessary to maintain data integrity over extended distances, avoiding the continuous operation of higher-power signal processing
Solution Approach 2:
The signal conditioning circuitry operates periodically or on-demand based on detection of communication needs, rather than continuously, reducing power consumption while maintaining data integrity when required
Data Source
AI summary
A circuit includes signal conditioner circuitry, level shifter circuitry, and state detector and controller circuitry coupled between the signal conditioner circuitry and the level shifter circuitry. The state detector and controller circuitry includes receiver circuitry and a finite state machine coupled to the receiver circuitry. The finite state machine is configured to detect a first data rate from signals, control operation of the signal conditioner circuitry responsive to detecting the first data rate, and control operation of the level shifter circuitry during a second data rate.


