Data Bus Transaction Selection Circuit for Vector Processing

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Solution Overview

Problem

In vector processing systems, the increasing number of registers required to manage transactions between a vector processor and memory banks leads to hardware resource inefficiency and increased power consumption due to traffic conflicts during data transfer.

Innovation Solution

A data bus with a transaction selection circuit that generates a conflict table to identify and select transactions with no traffic conflicts, using a memory data path with a tree structure to efficiently route transactions to memory banks, reducing the need for multiple registers and minimizing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the number of memory banks is increased to handle more transactions, then the data processing capacity is improved, but the number of registers required increases leading to hardware resource inefficiency

Engineering Contradiction:
Improvedata processing capacityVSAvoidnumber of registers
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces a transaction selection circuit as an intermediary component between the vector processor and memory banks. This circuit selectively routes transactions to appropriate memory banks while avoiding traffic conflicts, eliminating the need for additional registers to manage increased memory bank operations. The intermediary handles the complexity of coordinating multiple memory banks without proportionally increasing register requirements.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If more registers are used to manage transactions between vector processor and memory banks, then transaction management capability is improved, but power consumption increases due to traffic conflicts

Engineering Contradiction:
Improvetransaction management capabilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by stationary object

Solution Approach 1:

The transaction selection circuit acts as a mediator that intelligently routes transactions to memory banks without causing traffic conflicts. By preventing conflicts at the routing level rather than using multiple registers to manage them, the system achieves versatile transaction management while minimizing power consumption associated with register operations and conflict resolution.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The transaction selection circuit performs preliminary routing decisions before transactions reach the memory interface. By pre-selecting and routing transactions in advance, the system avoids last-minute conflict resolution that would require additional register operations and power consumption. The preliminary action of conflict-aware routing eliminates the need for power-intensive conflict management mechanisms.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If traditional data bus architecture is used without transaction selection, then hardware simplicity is maintained, but traffic conflicts occur reducing data transfer efficiency

Engineering Contradiction:
Improvehardware simplicityVSAvoiddata transfer efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The transaction selection circuit is integrated into the data bus architecture as a lightweight intermediary that adds minimal complexity. It monitors transaction routes and selectively directs transactions to avoid conflicts, providing significant efficiency improvements with minimal additional hardware. The circuit operates transparently within the existing bus structure, maintaining simplicity while enhancing performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11809339B2Data bus, data processing method thereof, and data processing apparatus
Publication Date: 2023.11.07 SAMSUNG ELECTRONICS CO LTD
  • US11809339B2 patent drawing
  • US11809339B2 patent drawing
  • US11809339B2 patent drawing

AI summary

A data bus includes: a transaction selection circuit configured to receive vector data including a plurality of transactions from outside of the data bus, select at least one transaction from the plurality of transactions in which no traffic conflict occurs based on whether there is a traffic conflict among the plurality of transactions, and output the selected at least one transaction; and a memory data path including at least one register and configured to output the selected at least one transaction provided by the transaction selection circuit via the at least one register to the outside of the data bus.