Data Capture Circuit Timing Adjustment for Jittered Test Signals
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Solution Overview
Problem
At high clock frequencies, automated test equipment systems face challenges in accurately synchronizing tester clock signals with device-under-test response data signals due to increased jitter, leading to false test results.
Innovation Solution
A digital data signal capture circuit that includes a transition detector, strobe adjustment circuit, and clock generator to synchronize the received digital data signal by sampling at multiple times, determining transition positions, and adjusting the strobe signal to capture data midway between jitter bands, ensuring accurate detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If clock frequency is increased to improve testing speed, then productivity increases, but synchronization accuracy deteriorates due to increased jitter
Solution Approach 1:
The system performs preliminary sampling of the data signal at multiple time points (early, center, late) before the actual data capture. This preliminary action allows the system to predict the optimal capture time by analyzing where transitions occur relative to the clock edge, thereby maintaining synchronization accuracy even at high clock frequencies where jitter is significant.
Solution Approach 2:
The system dynamically adjusts the data capture timing based on detected transition patterns. By monitoring where data transitions occur relative to clock edges and adjusting the capture window accordingly, the system adapts to timing variations caused by jitter, maintaining measurement precision while operating at high productivity.
2Reliability
If sampling time window is widened to capture jitter variations, then synchronization robustness improves, but measurement precision deteriorates due to larger jitter band
Solution Approach 1:
The system segments the sampling process into multiple discrete time points (early, center, late samples) rather than using a single widened sampling window. This segmentation allows the system to identify the precise timing of data transitions by comparing samples at different offsets, achieving both robustness to jitter and precision in data detection by selecting the optimal capture point based on the segmented samples.
Solution Approach 2:
The system replaces the mechanical approach of widening the sampling window with a signal processing approach using multiple phased samples and transition detection logic. Instead of physically expanding the capture window, the system uses logical analysis of multiple narrow samples taken at different phases to determine the optimal capture timing, thereby maintaining precision while achieving robustness through intelligent timing selection.
Data Source
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AI summary
A digital data signal capture circuit for synchronization of received digital data signals includes a transition detector for determining a state transition of the received digital data signal. The transition detector samples the received digital data signal at a first time, a second time and a third time and determines whether the transition occurs between the first time and the second time and whether it occurs between the first time and third time and generates an increment/decrement signal indicating a position for the transition. A strobe adjust circuit generates a strobe signal based on the increment/decrement signal. A capture circuit captures the received digital data signal using the strobe signal.