Data Transmission Circuit With Bit Inversion for Lower Write Power
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Solution Overview
Problem
The increase in storage unit density and number in semiconductor storage devices leads to increased power consumption in data transmission paths due to longer data paths and the need for higher bandwidth, which affects power saving performance.
Innovation Solution
A data transmission circuit with modules like serial-parallel conversion, comparison, and data conversion that reduce data inversion and path length to minimize power consumption while maintaining data accuracy during batch operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the density and number of storage units in the storage unit array are increased to meet market requirements for storage capability, then the storage capability is improved, but the length of the data transmission path between the data pad and storage array region increases, resulting in significantly increased power consumption
Solution Approach 1:
The patent divides the data transmission path into multiple segments by introducing intermediate data transmission regions. Data is transmitted in stages through these intermediate regions rather than directly across the entire distance, which reduces the power consumption of each individual transmission segment while maintaining overall data transmission capability.
Solution Approach 2:
The patent introduces a new spatial dimension by adding intermediate data transmission regions between the data pad and storage array. This creates a multi-stage transmission architecture that reduces the effective transmission distance in each stage, thereby reducing power consumption while preserving storage density.
2Productivity
If data writing or data reading is performed in batches to improve speed and efficiency, then the data processing efficiency is improved, but the data transmission bandwidth requirement increases, resulting in significantly increased power consumption
Solution Approach 1:
The patent segments the batch data transmission process into multiple stages through intermediate transmission regions. Each stage handles a portion of the data batch, allowing for more efficient power management and reducing the peak power consumption associated with high-bandwidth transmissions while maintaining overall processing efficiency.
3Loss of energy
If the power consumption of the data transmission path is reduced, then the power saving performance is improved, but the density and number of storage units must be reduced or the efficiency for reading data or writing data in batches is lowered
Solution Approach 1:
The patent achieves power savings by segmenting the transmission path into intermediate regions, which reduces the power consumption of each transmission stage. This segmentation allows the system to maintain full storage density and batch processing capability while reducing overall power consumption, as each segment operates at lower power levels.
Solution Approach 2:
The intermediate data transmission regions act as mediators between the data pad and storage array. These intermediary structures enable data transmission with reduced power consumption by breaking up direct long-distance transmissions into shorter staged transmissions, without compromising storage density or processing efficiency.
Data Source
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AI summary
The present application relates to a data transmission circuit and method, and a storage device. The data transmission circuit comprises a serial-parallel conversion module, a comparison module, a data conversion module, and a write circuit module. The serial-parallel conversion module is used for receiving multiple pieces of external data in batches, and outputting initial parallel data according to the external data. The comparison module is used for comparing the received initial parallel data with global data to output a comparison result of whether the number of bits by which the initial parallel data is different from the global data exceeds a preset threshold. The data conversion module is used for inverting the initial parallel data and then transmitting same to a data bus in the case that the comparison result exceeds the preset threshold, and transmitting the initial parallel data to the data bus in the case that the comparison result does not exceed the preset threshold. The write circuit module is used for transmitting data of the data bus to a global data bus.