Data Coding Device for Memory Controller Performance and Size
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Solution Overview
Problem
There is a need for a memory controller that improves performance and power efficiency while reducing the size of nonvolatile memory storage devices, particularly in portable devices where space is limited.
Innovation Solution
A data coding device and memory controller that includes a raw data storage, a counter to count reference data bits, and a data output circuit to invert raw data based on comparison results with previous data, optimizing data conversion and output to enhance performance and power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a memory controller is designed for nonvolatile memory in portable devices, then performance and power efficiency are improved, but device size increases
Solution Approach 1:
The patent merges the memory controller functionality directly into the nonvolatile memory device, creating an integrated solution. The memory controller includes components such as a host interface, memory interface, and data coding device, all integrated within the memory device itself. This integration eliminates the need for a separate memory controller chip, thereby improving performance and power efficiency while avoiding additional device size increase in portable applications.
Solution Approach 2:
The memory device is designed to perform multiple functions: it acts as both the nonvolatile memory storage and the memory controller. The device can manage data encoding, error correction, and communication with host devices, making it a universal component that replaces multiple separate components. This multi-functionality approach improves overall system performance while reducing the total device footprint.
2Productivity
If data coding is performed to improve performance and power efficiency, then processing capability increases, but device area increases
Solution Approach 1:
The data coding device is integrated within the memory controller structure, combining encoding functionality with the memory management components. This integration allows shared use of circuitry and resources, improving processing capability while minimizing the additional area required for coding operations.
Solution Approach 2:
The patent employs adjustable coding parameters and configurable data processing modes that can be optimized for different performance requirements. By changing operational parameters rather than adding fixed hardware for all possible coding scenarios, the device achieves high processing capability with reduced area overhead.
Data Source
AI summary
A data coding device may include a raw data storage configured to store raw data of which the total number of bits is 2N, a previous data storage configured to store previous data output before the raw data, a counter configured to count the number of reference data bits included in the raw data, and a data output circuit configured to invert and output the raw data according to a comparison result with the previous data when the number of reference data bits included in the raw data is N, and invert and output the raw data according to the number of reference data bits included in the raw data when the number of reference data bits included in the raw data is not N.


