Single Data Conversion Circuit for Semiconductor Memory
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Solution Overview
Problem
Conventional semiconductor memory apparatuses require two separate data conversion circuits, one for converting serial data to parallel data and another for converting parallel data to serial data, leading to increased area occupation and reduced integration.
Innovation Solution
A single data conversion circuit with a data conversion unit and an operation mode selection unit that uses a plurality of latches to convert serial data to parallel data during write operations and parallel data to serial data during read operations, utilizing a multiplexer and output driver to manage data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If two separate data conversion circuits are used (one for serial-to-parallel conversion and another for parallel-to-serial conversion), then data conversion functionality is ensured, but the area occupied by data conversion circuits increases and integration is reduced
Solution Approach 1:
The patent combines two separate data conversion circuits (serial-to-parallel converter and parallel-to-serial converter) into a single integrated circuit. This single circuit can perform both conversion functions by switching between different operation modes, thereby reducing the total area occupied while maintaining full data conversion functionality.
Solution Approach 2:
The patent designs a universal data conversion circuit that can perform multiple functions - both serial-to-parallel conversion and parallel-to-serial conversion. The circuit includes mode selection logic that determines whether to operate as a serial-to-parallel converter or a parallel-to-serial converter based on control signals, making it adaptable to different operational requirements without requiring separate dedicated circuits.
2Adaptability or versatility
If two separate data conversion circuits are used, then data transmission and reception are supported, but device complexity increases
Solution Approach 1:
The patent merges the functionality of two separate conversion circuits into one unified circuit structure. This reduces device complexity by eliminating redundant components and interconnections while maintaining the capability to handle both data transmission (serial-to-parallel) and data reception (parallel-to-serial) operations through mode switching.
Solution Approach 2:
The patent creates a multi-functional data conversion circuit that can adapt to different operational modes. The circuit includes control logic that selectively configures the same hardware resources to perform either serial-to-parallel or parallel-to-serial conversion, thereby supporting both data transmission and reception without requiring separate dedicated circuits for each function.
Data Source
AI summary
A data conversion circuit for a semiconductor memory apparatus includes a data conversion unit that has a plurality of latches for storing input data and outputting stored data as output data in response to a clock, and an operation mode selection unit that selects either a first operation mode to convert serial data to parallel data during a write operation or a second operation mode to convert parallel data to serial data during a read operation, to thereby drive the data conversion unit.