Data Driver Architecture for AMOLED Parasitic Compensation
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Solution Overview
Problem
Current data drivers for active matrix organic light emitting display (AMOLED) devices using the current writing method face challenges in maintaining uniform picture quality due to deviations in threshold voltages and mobility of poly-Si TFTs, and in compensating for parasitic resistance and capacitance loads, which affect the characteristics of output currents.
Innovation Solution
A data driver architecture that includes multiple first digital-to-analog converters and a second digital-to-analog converter commonly connected to all channels, generating correction currents to ensure that the output currents accurately correspond to digital data, thereby correcting for parasitic resistance and capacitance effects and maintaining uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional data driver with single digital-to-analog converters per channel is used, then the device complexity is low, but the output current characteristics deteriorate due to parasitic resistance and capacitance loads
Solution Approach 1:
The patent divides the data driver architecture into multiple segments: first digital-to-analog converters (one per channel) and a second digital-to-analog converter (common to all channels). This segmentation allows independent handling of channel-specific signals and common parasitic compensation, improving output current characteristics while managing complexity through modular design
Solution Approach 2:
The second digital-to-analog converter is designed with multi-functionality, serving all output channels simultaneously for parasitic resistance and capacitance compensation. This universal component reduces the need for separate compensation circuits for each channel, improving reliability without proportionally increasing device complexity
2Manufacturing precision
If poly-Si TFTs with large threshold voltage and mobility deviations are used, then the manufacturing process is simpler, but the picture quality uniformity deteriorates
Solution Approach 1:
The patent implements a feedback mechanism where the second digital-to-analog converter generates compensation currents based on detected variations in poly-Si TFT characteristics. This feedback loop continuously adjusts the output currents to compensate for threshold voltage and mobility deviations, achieving uniform picture quality despite manufacturing variations
Solution Approach 2:
The system dynamically changes the current parameters by adding compensation currents from the second digital-to-analog converter. This parameter adjustment compensates for deviations in poly-Si TFT characteristics, improving picture quality uniformity without requiring stricter manufacturing process control
3Manufacturing precision
If a constant current output data driver is implemented to compensate for parasitic loads, then the picture quality uniformity improves, but the device complexity increases due to additional digital-to-analog converters
Solution Approach 1:
The patent merges the parasitic compensation function into a shared second digital-to-analog converter that serves all channels simultaneously. This consolidation approach provides constant current output for parasitic load compensation while reducing the total number of converters compared to having separate compensation circuits for each channel
Solution Approach 2:
The second digital-to-analog converter acts as an intermediary component that mediates between the digital control signals and the analog output currents. It generates compensation currents that are added to the main output currents, enabling parasitic load compensation without requiring direct modification of each channel's primary converter
Data Source
AI summary
A data driver and a method of driving the same. The data driver includes a shift register for generating sampling signals; sampling latches for sampling digital data applied to output channels, respectively, in accordance with the sampling signals; holding latch units for receiving the sampled digital data of the channels from the sampling latches to hold the digital data for a first period; first digital-to-analog converters for receiving the held digital data of the channels from the holding latch units to generate currents corresponding to the digital data; a second digital-to-analog converter commonly connected to the channels and the first digital-to-analog converters to receive the digital data provided from the holding latch units for a second period and to generate correction currents for the data currents; and output stages for sampling, correcting, and driving final currents using the data currents and the correction currents.