Display Data Driver DAC Buffering to Prevent Resistor String Loading

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Solution Overview

Problem

Existing data drivers in flat panel display devices experience load effects due to direct connections between resistor strings of digital-to-analog converters, leading to distorted voltage division and inefficiencies in current distribution.

Innovation Solution

Incorporation of pseudo amplifiers and main amplifiers with class AB controllers to separate current paths between digital-to-analog converters, ensuring each converter receives a stable reference current independently, thereby preventing load effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If digital-to-analog converters are directly connected with resistor strings, then device complexity is reduced, but load effects occur causing voltage division distortion and current distribution inefficiency

Engineering Contradiction:
Improveconverter connection structureVSAvoidvoltage division stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

Pseudo amplifiers are introduced as intermediary components between the digital-to-analog converters and main amplifier. These pseudo amplifiers act as buffer stages that isolate the resistor strings from direct connection, preventing load effects while maintaining signal transmission. The pseudo amplifiers receive signals from multiple converters and condition them before passing to the main amplifier, thus resolving the contradiction between simple connection structure and stable voltage division.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If multiple digital-to-analog converters share a common main amplifier, then device complexity is reduced, but current distribution efficiency deteriorates due to load effects

Engineering Contradiction:
Improveamplifier configurationVSAvoidcurrent distribution efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The amplifier system is segmented into two distinct functional blocks: pseudo amplifiers and main amplifier. Each digital-to-analog converter is assigned to a specific pseudo amplifier, creating dedicated signal paths. This segmentation allows each converter to have its own current path through the pseudo amplifier to the main amplifier, eliminating load effects and improving current distribution efficiency while maintaining overall system integration.

Inventive Principle:
Principle #1Segmentation

3Manufacturing precision

If resistor strings of digital-to-analog converters are directly connected, then manufacturing precision requirements are reduced, but voltage division distortion occurs leading to poor display quality

Engineering Contradiction:
Improveresistor string connectionVSAvoidvoltage division accuracy
Core Design Contradiction:
Manufacturing precisionVSMeasurement precision

Solution Approach 1:

Pseudo amplifiers serve as intermediary buffering stages that isolate the resistor strings from direct interaction. By introducing these active components, the system achieves precise voltage division through active control rather than relying solely on passive resistor matching. This eliminates voltage division distortion caused by direct connections while maintaining manufacturing simplicity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12482389B2Data driver including first to third digital-to-analog converters and main amplifier, and display device including the data driver
Publication Date: 2025.11.25 SAMSUNG DISPLAY CO LTD
  • US12482389B2 patent drawing
  • US12482389B2 patent drawing
  • US12482389B2 patent drawing

AI summary

A data driver is disclosed that includes a first digital-to-analog converter, a second digital-to-analog converter, a third digital-to-analog converter, a first pseudo amplifier, a second pseudo amplifier, and a main amplifier. The first digital-to-analog converter includes a first resistor string including first resistors and a first decoder. The second digital-to-analog converter includes a second resistor string including second resistors and a second decoder, and is connected to the first digital-to-analog converter. The third digital-to-analog converter is connected to the second digital-to-analog converter. The first pseudo amplifier includes first and second driving transistors. The second pseudo amplifier includes third and fourth driving transistors. The main amplifier is connected to the first and second pseudo amplifiers, and is configured to generate a reference current. The second resistor string is connected between first and second nodes, and a first output node disposed between the first and second driving transistors is connected to the first node. A second output node disposed between the third and fourth driving transistors is connected to the second node.