Data Driver Adaptability for Normal and Dead Space Reduced Panels
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Solution Overview
Problem
Existing data drivers are not adaptable to different display panel structures, such as normal and dead space reduced panels, leading to inefficiencies in data voltage output.
Innovation Solution
A data driver configuration that includes a shift register array block, sampling latch array, holding latch array, digital-to-analog converter array, and output buffer array, with a controller that rearranges image data using an address line memory to generate suitable sampling signals for both normal and dead space reduced display panels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a data driver is configured for a specific display panel structure, then it can provide optimal data voltage output for that structure, but it cannot adapt to different display panel structures
Solution Approach 1:
The data driver is designed with multi-functional capability to support both normal display panels and dead space reduced display panels. The shift register array block can generate sampling signals in different sequences (first sequence for normal panels, second sequence for dead space reduced panels), and the output buffer array can output data voltages in different orders based on the panel type, making the device universal across different panel structures
Solution Approach 2:
The data driver employs dynamic reconfiguration capability where the shift register array block and output buffer array can switch between different operating modes based on the connected panel type. The sampling signal generation sequence and data voltage output order are dynamically adjusted according to whether a normal or dead space reduced panel is detected, enabling adaptive performance without fixed specialization
2Reliability
If dedicated data drivers are implemented for different display panel structures, then optimal performance for each panel type is achieved, but the number of required data drivers increases
Solution Approach 1:
Rather than implementing separate dedicated data drivers for normal and dead space reduced panels, this invention creates a single universal data driver that can function optimally with both panel types. The shift register array block generates sampling signals in appropriate sequences for each panel type, and the output buffer array delivers data voltages in the correct order, eliminating the need for multiple specialized drivers while maintaining optimal performance
3Reliability
If the data driver uses a fixed sampling signal generation sequence, then it works correctly for normal display panels, but it cannot correctly drive dead space reduced display panels
Solution Approach 1:
The shift register array block implements dynamic sequence selection where it can generate sampling signals in a first sequence for normal display panels or in a second sequence for dead space reduced display panels. This dynamic adaptation ensures that the sampling signal generation is always appropriate for the connected panel type, maintaining reliability across different configurations
Solution Approach 2:
The invention changes the temporal parameter of sampling signal generation by switching between different sequences. For normal panels, signals are generated in one temporal order, while for dead space reduced panels, the same shift register array block generates signals in a different temporal order, adapting the timing parameters to match the specific panel structure requirements
Data Source
AI summary
A display device includes a display panel, a data driver which provides data voltages to the display panel, and a controller which provides output image data to the data driver. The controller includes a data line memory which stores input image data for each pixel row of the display panel, an address line memory which stores addresses for the input image data, and a data serialize block which generates the output image data provided to the data driver by rearranging the input image data stored in the data line memory based on the addresses stored in the address line memory.