Data Driving Circuit Bias Control for Fast Low-Power Displays
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Solution Overview
Problem
Existing display devices face challenges in reducing power consumption while maintaining fast response speeds, particularly in light emitting display devices that utilize light emitting diodes.
Innovation Solution
Incorporation of a data driving circuit with multiple channels, latches, comparison circuits, level shifting circuits, digital-to-analog conversion circuits, and output buffers to optimize the control of data signals, reducing bias current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If bias current is increased in output buffers to maintain fast response speed, then response speed is improved, but power consumption increases
Solution Approach 1:
The patent applies dynamics by making the bias current adjustable rather than fixed. The output buffers operate in two modes: a first mode with higher bias current for fast response during initial operation, and a second mode with lower bias current for power savings during steady-state operation. This dynamic switching resolves the contradiction between maintaining fast response speed and reducing power consumption.
Solution Approach 2:
The patent implements periodic action through alternating between two operational modes. The output buffers periodically switch between the first operational mode (fast response, higher power) and the second operational mode (slower response, lower power). This periodic switching allows the system to achieve fast response when needed while consuming less power during normal operation, thereby resolving the technical contradiction.
2Use of energy by moving object
If bias current is reduced to lower power consumption, then power consumption is improved, but response speed deteriorates
Solution Approach 1:
The patent applies dynamics by making the bias current adjustable rather than fixed. The output buffers operate in two modes: a first mode with higher bias current for fast response during initial operation, and a second mode with lower bias current for power savings during steady-state operation. This dynamic switching resolves the contradiction between maintaining fast response speed and reducing power consumption.
Solution Approach 2:
The patent implements periodic action through alternating between two operational modes. The output buffers periodically switch between the first operational mode (fast response, higher power) and the second operational mode (slower response, lower power). This periodic switching allows the system to achieve fast response when needed while consuming less power during normal operation, thereby resolving the technical contradiction.
3Use of energy by moving object
If comparison circuit is added to control bias current dynamically, then power consumption is reduced, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the data driving circuit into multiple independent channels, each with its own comparison circuit and output buffer. This allows each channel to independently control its bias current based on whether latch data changes, achieving power savings without requiring complex centralized control logic. The segmentation approach reduces overall system complexity while maintaining effective power management.
Solution Approach 2:
The comparison circuits automatically detect changes in latch data and autonomously control the bias current of corresponding output buffers without external intervention. This self-service mechanism eliminates the need for complex external control logic, reducing device complexity while achieving dynamic power management. The system essentially manages its own power consumption based on actual data changes.
Data Source
AI summary
Disclosed is a display device including a data driving circuit and a display panel. In the data driving circuit, the plurality of latches store pieces of latch data, respectively, and the plurality of comparison circuit are positioned to correspond to the plurality of latches. Each of the plurality of comparison circuit compares present latch data with previous latch data, and outputs a first bias current control signal depending on the comparison result. The plurality of level shifting circuits respectively output pieces of image data by shifting levels of the pieces of latch data. Each of the plurality of sub-level shifting circuits outputs a second bias current control signal by shifting a level of the first bias current control signal.


