Data Driving Circuit Independent Latch Timing Control

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Solution Overview

Problem

Display defects such as color mixing occur due to latency in scan signals, which existing display devices fail to effectively address, especially during high-speed driving.

Innovation Solution

A data driving circuit that independently controls the output timing of data voltage for each latch, allowing for varying sampling and holding times, and includes a data controller to delay the output timing of data voltage from the sides towards the central part of the display panel, preventing simultaneous data voltage application with scan signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If data voltage is output at the same timing for all channels, then the device complexity is reduced, but display defects such as color mixing occur due to scan signal latency

Engineering Contradiction:

Improvecontrol complexityVSAvoiddisplay quality

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The patent divides the data driving circuit into multiple independent latch units (first latch unit, second latch unit, etc.), each capable of independent timing control. This segmentation allows different regions of the display panel to have customized output timing, preventing color mixing while maintaining manageable system complexity through modular design.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent applies different output timing characteristics to different regions of the display panel. Specifically, the central region uses a delayed output timing relative to the side regions, creating local quality differentiation that compensates for scan signal latency and prevents display defects in the central area.

Inventive Principle:

Principle #3Local quality

2Productivity

If high-speed driving is implemented, then the productivity is improved, but display defects occur due to scan signal latency

Engineering Contradiction:

Improvedriving speedVSAvoiddisplay quality

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent implements preliminary timing adjustment by delaying the output timing of the data driving circuit in advance before the scan signal reaches the central region. This preliminary action ensures that data voltage is applied to the central region after the scan signal has already been applied, preventing color mixing even during high-speed driving operations.

Inventive Principle:

Principle #10Preliminary action

3Reliability

If the output timing of data voltage is delayed for central region, then display quality is improved, but the loss of time increases

Engineering Contradiction:

Improvedisplay qualityVSAvoidoutput timing delay

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The timing delay is applied locally only to the central region of the display panel, not to the entire display. The side regions maintain their original output timing, so the time loss is minimized and confined only to the central area where scan signal latency causes display defects.

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS11798466B2Data driving unit and display device including the same

Publication Date: 2023.10.24 LG DISPLAY CO LTD

AI summary

A display device can include a display panel configured to display an image, a scan driving circuit configured to supply a scan signal to the display panel, and a data driving circuit configured to supply a data voltage to the display panel. The data driving circuit can include a data controller configured to vary an output timing of the data voltage based on independent control for each of at least one latch.