Data Driving Apparatus Synchronous Output Control
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Solution Overview
Problem
Conventional data driving apparatuses for large-scale displays face challenges in outputting data synchronously due to individual clock generators producing clocks with different frequencies, leading to asynchronous data processing in parallel data driving circuits.
Innovation Solution
The data driving apparatus includes two data driving circuits with separate timing controllers and clock generators, where one timing controller processes data and sends an enable command to the other to start processing, ensuring both circuits output data synchronously despite operating on individual clocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If multiple data driving circuits are integrated into one single chip to achieve benefits of single integration, then device integration is improved, but data synchronization between circuits deteriorates due to individual clock generators producing different frequencies
Solution Approach 1:
The patent merges multiple data driving circuits and their associated timing controllers into a single integrated chip, achieving the benefits of single-device integration while maintaining data synchronization through shared clock generation and coordinated control mechanisms
Solution Approach 2:
The patent introduces a master timing controller as an intermediary that generates a reference clock signal and coordinates the operation of multiple data driving circuits, ensuring synchronous data output despite the circuits being integrated on the same chip
2Use of energy by moving object
If data transmission is stopped to save power according to MIPI protocol, then energy consumption is reduced, but data processing synchronization between timing controllers deteriorates
Solution Approach 1:
The patent implements feedback mechanisms where timing controllers monitor data transmission states and adjust their operation accordingly, maintaining synchronization awareness even when data transmission is stopped for power saving according to MIPI protocol
Solution Approach 2:
The patent employs preliminary synchronization actions where timing controllers establish and maintain clock synchronization before entering power-saving mode, ensuring that when data transmission resumes, synchronization is already established and no data loss occurs
Data Source
AI summary
A data driving apparatus includes two data driving circuits, each including a timing controller with a clock generator and configured to receive a specific portion of data corresponding to a row of pixel in an image frame, and, after receiving the specific portion of the data, process the portion of the data; wherein the two timing controllers have different data operation times. One timing controller outputs an enable command to another one once the processing of the respective portion of the data is complete. Then, another timing controller starts to process the respective portion of the data and output an output command to the first data driving circuit in response to a finish of the processing of the second portion of the data and thereby controlling the two data driving circuits to output the processed data. An operation method thereof and a display using the same are also provided.