Data Equalizing Circuit Using Phase-Shifted Transition Dispersion
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Solution Overview
Problem
Conventional data equalizing circuits require additional hardware and increased power consumption to generate a high number of sampling clocks with uniform phase differences, which is inefficient for precise data transition distribution detection.
Innovation Solution
A data equalizing circuit and method that divides data into N calculation periods with different phase shifts within each unit interval, using a multi-phase locked loop to generate clocks with varying phase differences, allowing for precise detection of data transition frequencies and dispersion values, thereby optimizing the control code for data correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a high number of sampling clocks with uniform phase differences are generated to precisely detect data transition distribution, then measurement precision is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent divides the unit interval (UI) into multiple calculation periods (N periods where N > n) with different phase shifts, rather than using numerous uniformly spaced sampling clocks. This segmentation approach allows precise detection of data transition distribution by analyzing transitions across differently phased periods, achieving the same measurement precision with fewer clock signals and reduced hardware complexity.
Solution Approach 2:
The patent changes the phase shift parameter of calculation periods relative to unit intervals to optimize detection. By varying phase shifts of N calculation periods with respect to n UIs (where each UI has a different phase shift relationship), the system achieves precise data transition detection without requiring a high number of uniformly spaced sampling clocks, thus reducing device complexity while maintaining measurement precision.
2Measurement precision
If a high number of sampling clocks with uniform phase differences are generated to precisely detect data transition distribution, then measurement precision is improved, but power consumption increases
Solution Approach 1:
The patent segments the detection process into N calculation periods with different phase shifts instead of using numerous uniformly spaced sampling clocks. This segmentation reduces the total number of clock signals required, directly lowering power consumption while maintaining the ability to precisely detect data transition distribution through phased period analysis.
Solution Approach 2:
By changing the phase shift parameters of calculation periods relative to unit intervals, the patent achieves precise measurement with fewer operational clock signals. This parameter optimization reduces the energy required for clock generation and signal processing, thereby lowering power consumption while preserving measurement precision.
3Measurement precision
If additional hardware is added to generate high frequency sampling clocks, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent employs segmentation of the UI into N calculation periods with varying phase shifts, eliminating the need for additional hardware to generate high-frequency uniformly spaced sampling clocks. The phased period division approach achieves precise data transition detection using existing hardware resources, thereby improving measurement precision without increasing device complexity or hardware design burden.
Solution Approach 2:
The patent utilizes parameter changes in phase shifts of calculation periods to achieve precise detection functionality without additional hardware. By optimizing the phase relationship between N calculation periods and n UIs, the system achieves high measurement precision using existing hardware capabilities, avoiding the need for extra clock generation circuits and reducing overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces hardware design burden and power consumption while enabling precise detection of data transitions, improving the accuracy of data correction without the need for additional hardware.
Implementation Method 1
using a multi-phase locked loop to generate clocks with varying phase differences
Data Source
AI summary
A data equalizing circuit includes an equalizer configured to output data according to a control code; and a detection unit configured to divide the data into N number of calculation periods, count data transition frequencies for the N calculation periods, calculate dispersion values of the data transition frequencies for the N calculation periods, and output the control code corresponding to a largest dispersion value, in response to a counting interruption signal and a counting completion signal, wherein n is equal to or greater than 2, N is greater than n, and the data is divided to n number of unit intervals (UI), andwherein a phase shift of each of the calculation periods with respect to its corresponding UI is different from a phase shift of any of the other calculation periods with respect to its corresponding UI.