Data Interleaving Layout for Burst Error Correction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Communication systems face interference issues due to environmental conditions, leading to data corruption, particularly with burst errors that conventional error correction methods struggle to handle effectively.

Innovation Solution

The implementation of an interleaver and deinterleaver system that reorders data bits to distribute errors across a longer period, utilizing constituent codes and modulation schemes like QAM, ensuring balanced bit distribution and error correction capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional error correction methods are used, then the system can handle simple errors, but it fails to handle burst errors effectively

Engineering Contradiction:
Improveerror correction capabilityVSAvoidhandling capability for burst errors
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The data stream is segmented into individual data units that are then interleaved with parity units. This segmentation allows the system to treat burst errors as scattered errors across multiple segments, enabling conventional error correction methods to handle each segment independently and effectively correct errors that would otherwise be concentrated in a burst pattern.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An interleaving mechanism is introduced as an intermediary between the data transmission and error correction processes. This intermediary reorders data units and parity units such that burst errors affecting consecutive transmitted units are distributed across multiple logical data units, transforming the error pattern into one that conventional correction methods can handle.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If data is transmitted without interleaving, then the transmission is simple and fast, but burst errors cause significant data corruption

Engineering Contradiction:
Improvetransmission speedVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The interleaving of data units and parity units is performed in advance before transmission. This preliminary action ensures that even if a burst error occurs during transmission, the corrupted units are distributed across multiple logical data units rather than concentrating damage in one location, thereby maintaining data integrity without requiring complex real-time error handling during transmission.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If interleaving is implemented, then burst error tolerance is improved, but the system complexity increases

Engineering Contradiction:
Improveburst error toleranceVSAvoidinterleaver system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The interleaving process is segmented into simple, repetitive operations of assigning data units to specific parity units based on predetermined rules. This segmentation of the interleaving process into manageable, rule-based steps reduces implementation complexity while maintaining effective burst error tolerance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system uses parameter-based interleaving where data units are assigned to parity units based on parameters such as unit indices and interleaving patterns. By changing and adjusting these parameters, the system can adapt to different error conditions and data rates without fundamentally changing the interleaver structure, thereby managing complexity through parameter adjustment rather than structural complexity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10840948B2System, method, and apparatus for interleaving data
Publication Date: 2020.11.17 ACACIA TECH INC
  • US10840948B2 patent drawing
  • US10840948B2 patent drawing
  • US10840948B2 patent drawing

AI summary

A method, system, and apparatus for interleaving data including creating a buffer, writing input data, and reading output data out of the buffer.