Data Interleaving Layout for Low-Latency Cascaded FEC
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Solution Overview
Problem
Existing cascaded FEC transmission solutions in optical communication systems face challenges in achieving good performance in scenarios requiring low latency due to high latency in convolutional interleaving.
Innovation Solution
A data interleaving method involving separate delays of data streams using n delay lines with specific delay values and subsequent interleaving of symbol sets to reduce latency while maintaining performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If convolutional interleaving with high latency is used to achieve good performance in cascaded FEC transmission, then the error correction performance is improved, but the transmission latency increases
Solution Approach 1:
The patent segments the interleaving process into two distinct stages: a first interleaving stage performed before outer-code encoding, and a second interleaving stage (convolutional interleaving) performed after outer-code encoding. This segmentation allows each stage to be optimized independently - the first stage provides basic interleaving with lower latency, while the second stage provides enhanced error correction performance, thus resolving the contradiction between performance and latency
Solution Approach 2:
The patent performs preliminary interleaving before outer-code encoding, preparing the data in advance with a lower-latency interleaving method. This preliminary action reduces the burden on the subsequent convolutional interleaving stage, allowing it to focus on performance optimization while the overall system latency is controlled by the earlier, faster interleaving operation
Data Source
AI summary
A data interleaving method including the following steps: separately delaying n data streams based on n delay lines, a delay value of each delay line is any delay value in a delay value set, the delay value set includes p delay values, a difference between every two adjacent delay values in the p delay values in the delay value set in ascending order is V symbols, a quantity of delay lines corresponding to each delay value in the delay value set is n/p, and V is an integer greater than or equal to 34; obtaining L*m symbols from each of n delayed data streams to obtain L first symbol sets; and separately interleaving the L first symbol sets to obtain L second symbol sets, where a quantity of symbols in the second symbol set is the same as a quantity of symbols in the first symbol set.


