Data I/O Circuit Inversion Verification via Flag Comparison
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Solution Overview
Problem
Conventional semiconductor memory devices lack a direct method to determine whether the data inversion function is properly performed during input/output operations, requiring separate test devices to verify the function's correctness.
Innovation Solution
A semiconductor memory device with a data input/output circuit that includes a data inversion unit and a flag comparison unit, where the input inversion flag is stored and compared with the output inversion flag using an exclusive OR gate and NMOS transistors to generate an inversion determination signal, allowing for the determination of the data inversion function's normal operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If separate test devices are used to determine data inversion function correctness, then measurement precision can be maintained, but device complexity and testing time increase
Solution Approach 1:
The data input/output circuit performs self-verification by comparing its own input inversion flag with its output inversion flag internally, eliminating the need for external test devices. The circuit uses its internal resources (memory block, XOR gate, NMOS transistors) to generate the inversion determination signal, achieving self-diagnosis functionality.
Solution Approach 2:
The data input/output circuit is designed to perform both data transmission and self-verification functions. By integrating the flag comparison mechanism into the existing circuit structure, the same circuit that handles data I/O operations also performs inversion function verification, making the circuit multi-functional.
2Reliability
If data inversion function is added to reduce simultaneous switching noise, then signal integrity improves, but device complexity increases
Solution Approach 1:
The inversion determination function is merged with the existing data input/output circuit structure. The flag comparison mechanism (XOR gate, NMOS transistors, memory block) is integrated into the circuit that already handles data inversion, combining multiple functions into a unified structure rather than adding separate verification circuits.
Solution Approach 2:
The circuit uses feedback from its own operational state (input inversion flag and output inversion flag) to generate the inversion determination signal. This feedback mechanism allows the circuit to monitor its own inversion performance and provide verification information without requiring external testing equipment.
Data Source
AI summary
A data input/output circuit of a semiconductor memory device has a data inversion determination function. In an input mode, the data input/output circuit inverts an input data group in response to an input inversion flag and transmits the inverted input data group to a memory cell array. In an output mode, the data input/output circuit inverts a data group, output from the memory cell array, when the output data group satisfies a predetermined inversion condition, and transmits the inverted output data group to the outside of the data input/output circuit. In this case, an output inversion flag, indicating that the output data group is to be inverted, is generated. Further, the data input/output circuit stores the input inversion flag in the memory cell array in the input mode, and compares the input inversion flag, stored in the memory cell array, with the output inversion flag in the output mode. According to the data input/output circuit and the semiconductor memory device having the data input/output circuit, it can be readily determined whether a data inversion function is normally performed.