Semiconductor Data Line Layout for Contact Pattern Formation

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Solution Overview

Problem

Conventional semiconductor memory devices face challenges in maintaining sufficient spacing between pad extension portions of word lines during the photo-etching process, especially when the line width is reduced, which complicates the formation of contact patterns.

Innovation Solution

The semiconductor device employs a data block with M parallel and sequentially arranged data lines, divided into two decoder regions, where the first data line group includes even and odd-numbered lines extending to one decoder, and the second group includes odd and even-numbered lines extending to the opposite decoder, with pad extension portions oriented in opposite directions to minimize spacing and allow for efficient contact pattern formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If the line width of word lines is reduced to increase integration density, then the spacing between pad extension portions is reduced, but it becomes difficult to maintain sufficient spacing for contact pattern formation

Engineering Contradiction:
Improveintegration densityVSAvoidcontact pattern formation
Core Design Contradiction:
Area of moving objectVSManufacturing precision

Solution Approach 1:

The word lines are divided into two separate groups: even-numbered word lines and odd-numbered word lines. Each group is routed to a separate decoder region (first decoder region and second decoder region respectively). This segmentation allows the pad extension portions of adjacent word lines to be positioned in different spatial locations, thereby maintaining sufficient spacing for contact pattern formation while enabling reduced line width for higher integration density.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new spatial dimension by creating separate decoder regions positioned at different locations (e.g., opposite sides of the data block). By routing even and odd word lines to different decoder regions, the pad extension portions are separated in the planar dimension, allowing reduced line width without compromising contact pattern formation spacing requirements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of moving object

If the pitch between bit lines and word lines is narrowed to increase capacity, then the layout complexity increases, but providing two row decoders and two column decoders on opposite sides helps manage this complexity

Engineering Contradiction:
Improvestorage capacityVSAvoidlayout complexity
Core Design Contradiction:
Area of moving objectVSDevice complexity

Solution Approach 1:

The decoder structure is segmented into four separate decoder regions: first row decoder region, second row decoder region, first column decoder region, and second column decoder region. These are positioned on opposite sides of the data block, with even and odd word lines routed to different row decoder regions. This segmentation distributes the routing complexity across multiple regions, making the overall layout more manageable while enabling narrower pitch between bit and word lines for increased capacity.

Inventive Principle:
Principle #1Segmentation

3Ease of operation

If even and odd word lines are alternately connected to left and right decoder regions, then a larger interval between pad extension portions is obtained, but this increases the spacing requirement

Engineering Contradiction:
Improvecontact pattern formationVSAvoidspacing between pad extension portions
Core Design Contradiction:
Ease of operationVSLength of stationary object

Solution Approach 1:

Instead of connecting adjacent word lines (even and odd) to opposite decoder regions as in conventional designs, the patent inverts this approach by connecting even-numbered word lines to the first decoder region and odd-numbered word lines to the second decoder region. This inversion allows adjacent word lines to be routed to the same decoder region, minimizing the interval between their pad extension portions while still providing sufficient spacing for contact pattern formation through the systematic routing pattern.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS7645644B2Data line layout in semiconductor memory device and method of forming the same
Publication Date: 2010.01.12 SAMSUNG ELECTRONICS CO LTD
  • US7645644B2 patent drawing
  • US7645644B2 patent drawing
  • US7645644B2 patent drawing

AI summary

In one aspect, a semiconductor device is provided which includes a data block including M parallel and sequentially arranged data lines numbered {0, 1, 2, . . . n, n+1, . . . , m−1, m}, where M, n and m are positive integers, and where n<m, and M=m+1, and a first decoder region and a second decoder region respectively located on opposite sides of the data block. A first data line group among the M data lines extend to the first decoder region from the data block, and a second data line group among the M data lines extend to the second decoder region from the data block. The first data line group includes even numbered data lines among the data lines {0, 1, 2, . . . n}, and odd numbered data lines among the data lines {n+1, . . . m−1, m}, and the second data line group includes odd numbered data lines among the data lines {0, 1, 2, . . . n}, and even numbered data lines among the data lines {n+1, . . . m−1, m}.