Data Output Circuit Inversion to Reduce Simultaneous Switching Noise
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Solution Overview
Problem
Semiconductor devices face challenges in achieving high performance and signal integrity due to simultaneous switching noise (SSN) generated when outputting data through multiple pads, which distorts waveforms and degrades signal integrity, especially at high frequencies.
Innovation Solution
A semiconductor device employing a data inversion scheme that compares current output data with previous data to determine the number of toggled bits and inverts the output accordingly, reducing the number of toggled bits to less than half and thereby minimizing SSN, enhancing signal integrity and I/O characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data are simultaneously outputted through thirty two or more data pads, then data output speed is improved, but simultaneous switching noise distorts waveforms and degrades signal integrity
Solution Approach 1:
The patent applies data inversion technique where the output data is inverted based on the number of toggled bits. When the number of toggled bits exceeds a threshold (e.g., 16 bits for 32-bit data), the output data is inverted to reduce the number of simultaneous transitions. This inversion principle directly addresses the contradiction by maintaining high-speed parallel output while controlling SSN through intelligent data manipulation.
Solution Approach 2:
The patent changes the parameter of output data representation by inverting bits based on toggle count. The system monitors the number of toggled bits and conditionally inverts the entire data word, effectively changing the output parameter to minimize simultaneous switching activity. This dynamic parameter change allows the system to maintain high productivity while reducing harmful SSN effects.
2Object-affected harmful factors
If the number of toggled bits is reduced to less than half, then simultaneous switching noise is minimized, but additional circuitry for detecting and inverting data is required
Solution Approach 1:
The patent implements preliminary detection of toggled bits before data output. The toggle detection circuit counts the number of changed bits in advance, and the inversion control logic determines whether inversion is needed before the actual data output occurs. This preliminary action allows the system to prepare the optimal data representation (inverted or non-inverted) to minimize SSN while maintaining relatively simple circuit architecture.
Solution Approach 2:
The patent introduces an intermediary inversion control circuit that sits between the data output circuit and the external interface. This intermediary component includes a toggle detection unit and an inversion control unit that mediates the data flow, deciding whether to invert based on toggle count. This intermediary approach effectively reduces SSN while keeping the added complexity localized and manageable.
Data Source
AI summary
A semiconductor device may include a data output circuit and control signal output circuit. The data output circuit may convert a first input signal and a second input signal sequentially inputted thereto into output data and may compare the first and second input signals with a storage datum to generate a first comparison signal and a second comparison signal. The control signal output circuit may detect logic levels of bits included in the first and second comparison signals to generate a first detection signal and a second detection signal, may generate a first flag signal and a second flag signal from the first and second detection signals in response to a storage flag signal, and may sequentially output the first and second flag signals as transmission control signals.