Data Packet Routing Apparatus for High Data Rate Networks
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Solution Overview
Problem
Current high data rate communications networks face challenges in achieving efficient routing due to the complexity and cost of multi-stage architectures, which require a large number of line cards and result in bottlenecks and increased complexity.
Innovation Solution
A data packet routing apparatus with a first stage that constructs and distributes groups of data sets to be routed in parallel and synchronized manner, simplifying the central switching stage and facilitating control of routing capacity by reducing the number of information items managed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a multi-stage architecture with a large number of line cards is used to achieve very high switching data rates, then the routing capacity is improved, but the device complexity and cost increase significantly
Solution Approach 1:
The routing apparatus is divided into three functional stages: a first stage for pre-routing data to intermediate outlets, a second stage for routing pre-routed data to final outlets, and a third stage for post-routing data to destination outlets. This segmentation allows the system to achieve very high switching data rates while managing complexity through modular design, avoiding the need for a single large-scale switch with thousands of line cards.
Solution Approach 2:
The patent introduces a temporal dimension to the routing process by implementing synchronized parallel routing operations across multiple stages. Data sets are grouped and routed in synchronized time slots, allowing the system to achieve high throughput by utilizing time-division multiplexing across the three stages, effectively adding a time dimension to the spatial routing architecture.
2Productivity
If a multi-stage architecture with a large number of line cards is used to achieve very high switching data rates, then the routing capacity is improved, but the cost increases due to very large switching capacity requirements
Solution Approach 1:
The patent merges multiple routing functions into a coordinated three-stage architecture where each stage performs a specific function (pre-routing, routing, post-routing). By combining these stages and using synchronized parallel operations, the system achieves the equivalent capacity of a much larger single-stage switch while requiring fewer individual line cards, thereby reducing manufacturing cost.
Solution Approach 2:
The routing apparatus operates in periodic cycles where data sets are grouped and routed in synchronized time slots. This periodic operation allows efficient utilization of routing resources across the three stages, achieving high switching data rates without requiring excessive switching capacity in each individual stage, thus reducing overall system cost.
3Productivity
If a multi-stage architecture is used to interconnect a very large number of line cards, then the routing capacity is improved, but re-ordering of routed data groups is required which increases complexity
Solution Approach 1:
The first stage performs pre-routing operations that organize data into groups destined for specific outlet sub-stages before the data enters the second stage. By performing this preliminary organization, the system minimizes the re-ordering requirements in subsequent stages, as data groups are already partially sorted by their destination, reducing the overall re-ordering complexity.
Solution Approach 2:
The second stage acts as an intermediary between the first and third stages, receiving pre-routed data groups and performing the necessary re-ordering to prepare them for post-routing. This intermediate stage absorbs the re-ordering complexity, allowing the first and third stages to operate with simpler, more predictable data flow patterns.
Data Source
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AI summary
Data packet routing apparatus (D) for a node of a communications network, which apparatus comprises: i) a first stage (E1) comprising N parallel inlet sub-stages (SLCE1-SLCEN), each of which serves to pre-route to J outlets of said inlet sub-stage data received at the inlets in the form of packets; ii) a second stage (E2) comprising J parallel routing blocks (BA1-BAJ), each of which serves to route to Q outlets pre-routed data received at N inlets; and iii) a third stage (E3) comprising Q parallel outlet sub-stages (SLCS1-SLCSQ), each of which serves to post-route to outlets routed data received at J inlets. The first stage (E1) serves to act over cycles comprising M periods to construct groups of J sets with data waiting to be routed within the same inlet sub-stage and whose destination is one of the outlet sub-stages, and to distribute the J sets of each group, having the same inlet sub-stage and the same outlet sub-stage, to the J routing blocks (BA1-BAJ) all placed in the same routing configuration, so that they route them in parallel and in a synchronized manner to a destination outlet sub-stage. The routing configuration of the J routing blocks may be modified at every period so that, during a cycle of M periods, each of said outlet sub-stages may receive all of the groups of data sets that it is to post-route.