Data Plane Egress Link Failure Marking With Hardware Packets
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Solution Overview
Problem
Existing solutions for marking failed egress paths in forwarding elements, such as switches or routers, are slow due to software-based tracking in the control plane, leading to significant delays in high-speed forwarding.
Innovation Solution
A hardware-based packet-processing pipeline in the data plane performs a set of operations to quickly mark failed egress paths using a hardware forwarding element with an ingress and egress pipeline, including a parser, match-action unit, and deparser, which generates packets with failed link identification and updates a dual port memory status bit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If software in the control plane is used to track and mark failed paths, then the system can maintain accurate path status information, but the marking process becomes slow and introduces significant delays
Solution Approach 1:
The patent replaces the software-based control plane mechanism with a hardware-based data plane mechanism. Specifically, it uses hardware packet generators to create failure notification packets, hardware match-action tables to detect these packets, and hardware memory structures to update path status bits, thereby eliminating software processing delays while maintaining accurate path status tracking
Solution Approach 2:
The patent introduces an intermediary hardware packet generator that creates specialized failure notification packets. These packets act as intermediaries between the failure detection mechanism and the path status update mechanism, enabling fast hardware-based communication of failure information without requiring software intervention
2Productivity
If hardware-based packet processing is implemented in the data plane, then the marking speed increases to microseconds, but the device complexity increases
Solution Approach 1:
The patent leverages existing multi-functional hardware components in the forwarding element. The packet generator, which can generate various types of packets, is extended to generate failure notification packets. The match-action tables, used for general packet forwarding decisions, are configured to also match failure notification packets. This multi-functional use of existing hardware reduces the need for dedicated new components
Solution Approach 2:
The patent merges the failure detection and path status update functions into the existing data plane packet processing pipeline. Instead of creating separate hardware subsystems, it combines failure notification packet generation, matching, and status bit updates within the existing packet processing flow, thereby achieving fast path marking while minimizing additional device complexity
Data Source
AI summary
A method of identifying a failed egress path of a hardware forwarding element. The method detects an egress link failure in a data plane of the forwarding element. The method generates a link failure signal in the data plane identifying the failed egress link. The method generates a packet that includes the identification of the egress link based on the link failure signal. The method sets the status of the egress link to failed in the data plane based on the identification of the egress link in the generated packet.