Address-Selectable Data Poisoning Circuitry for Memory Validation
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Solution Overview
Problem
Memory systems lack the ability to validate, debug, and decode operations effectively, as users cannot confirm whether error correction and redundancy operations are accurately executed, leading to the need for intentionally defective memory devices for validation purposes, which is costly and inefficient.
Innovation Solution
Incorporating address-selectable data poisoning circuitry that allows users to identify and poison specific data bits, generating known bit errors for validation and debugging purposes, eliminating the need for intentionally defective devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory systems use error correction and redundancy operations, then reliability is improved, but the ability to validate and debug these operations deteriorates because users cannot confirm accurate execution
Solution Approach 1:
The patent introduces an intermediary data poisoning circuit that sits between the memory array and the output, allowing users to inject known errors into specific data bits. This intermediary mechanism enables validation of error correction operations by providing controlled test conditions without compromising the actual error correction functionality.
Solution Approach 2:
The patent creates a copy of the data path through the data poisoning circuit, which can selectively corrupt specific bits. This allows the system to test error correction operations on copied data paths while leaving the primary data intact, enabling debugging without affecting actual memory operations.
2Ease of operation
If intentionally defective memory devices are used for validation purposes, then debugging capability is improved, but manufacturing cost and efficiency deteriorate
Solution Approach 1:
The patent implements self-service by integrating data poisoning circuitry directly into the memory device structure. This allows the memory device to generate its own test patterns and known errors internally, eliminating the need for externally manufactured defective devices while maintaining full debugging capability.
Solution Approach 2:
The data poisoning circuit serves multiple functions: it can poison specific data bits for testing, it can validate error correction operations, and it can debug memory operations. This multi-functional approach replaces the need for separate intentionally defective devices, reducing manufacturing complexity and cost.
3Ease of operation
If data poisoning circuitry is added to memory systems, then validation and debugging capability are improved, but device complexity increases
Solution Approach 1:
The data poisoning circuit is segmented into distinct functional blocks: address registration units, poison control logic, and datapath poison control logic. Each segment handles a specific aspect of the data poisoning function, making the overall complex system manageable and maintainable while providing fine-grained control over error injection.
Data Source
AI summary
Memory with address-selectable data poisoning circuitry is disclosed herein. In one embodiment, a memory device comprises circuitry operably connected to a memory array. The circuitry can include memory row address registers and/or memory column address registers. Standard access commands or mode register write commands can be used to load a memory row address or a memory column address into the memory row address registers or the memory column address registers, respectively. During a read operation directed to a second memory row and/or column of the memory array, the circuitry can compare the second memory row to the first memory row and/or the second memory column to the first memory column, and can poison a data bit read from the memory array before the data bit is output from the memory device when the first and second memory row addresses match and/or when the first and second memory column addresses match.