Data Processing Device Concurrent Write Segmentation

The patent segments the writing process into multiple independent threads: a first thread handles sequential log structured writing while a second thread handles random key-value store processing. This segmentation allows both writing modes to operate concurrently without interfering with each other, thus improving random writing performance while maintaining sequential writing speed.

The patent implements dynamic thread management where the second thread is activated only when random writing requests are received, and can be suspended when not needed. This dynamic approach allows the system to adapt to varying workloads, improving random writing performance when needed while avoiding overhead when not required.

The patent segments the data writing process into two independent paths: complete key-value writes for reliability and incremental partial writes for buffer efficiency. By dividing the writing workload between these paths, the system maintains data integrity while reducing the required buffer size.

The patent implements partial writing action by allowing the second thread to write key-value pairs incrementally as they are received, rather than waiting for complete data reception. This partial action approach reduces buffer requirements while maintaining acceptable reliability through the dual-thread architecture.

The patent segments the concurrent processing capability across two threads, allowing each thread to handle a portion of the write requests independently. This segmentation enables the system to process multiple client writes simultaneously without requiring a single large buffer, thus improving productivity while reducing memory consumption.

The patent merges the capabilities of sequential writing and random writing into a unified dual-thread architecture. By combining these two writing modes in parallel, the system achieves high concurrent processing capability without needing to provision for the worst-case scenario of all requests arriving simultaneously, thereby reducing memory requirements.

The patent segments the writing operations into two independent threads with different reliability approaches: the first thread uses sequential writing for reliability, while the second thread handles random writes with its own integrity mechanisms. This segmentation allows the system to achieve high overall writing speed while maintaining reliability through the first thread's sequential approach.

The patent ensures continuity of useful action by having the second thread continuously process random writing requests as they arrive, without waiting for network conditions to be perfect. Combined with the first thread's continuous sequential writing, this maintains high writing speed while the dual-thread architecture provides failure handling capability.