Data Processing Apparatus Using Segmented Output Switch Modules
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Solution Overview
Problem
Existing switched networks face high computation complexity and low data read speed due to the need for an N×N output switch module to exchange data, which becomes inefficient when N is large.
Innovation Solution
A data processing apparatus with N input ends, an input switch module, K buffer areas, and two output switch modules (K1×M and K2×M) that jointly complete output data computation, reducing complexity and increasing read speed by distributing data across multiple buffer areas and output ends.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If an N×N output switch module is used to exchange data in a switched network, then the data exchange function is completed, but the computation complexity becomes high and data read speed becomes low when N is large
Solution Approach 1:
The patent divides the single N×N output switch module into multiple smaller output switch modules (first output switch module and second output switch module). Each module handles a subset of buffer areas, reducing the computation complexity of individual modules while maintaining overall data exchange capability. This segmentation directly addresses the contradiction by lowering the complexity burden on each module, thereby improving data read speed.
2Productivity
If data is stored in multiple buffer areas using load balancing method, then buffer utilization is improved, but the device complexity increases
Solution Approach 1:
The patent segments the buffer areas into multiple groups (K buffer areas divided between first and second output switch modules). Each output switch module is responsible for specific buffer areas, which simplifies the control logic for each module compared to a single monolithic switch module managing all buffers. This segmentation enables better buffer utilization while keeping individual module complexity manageable.
Solution Approach 2:
The patent introduces a dimensional decomposition by separating the output switch function into multiple parallel modules, each handling a subset of buffers. This transforms the single-dimension problem of managing N×N switches into a multi-dimensional architecture where K1+K2=K buffer areas are distributed across multiple modules, reducing the complexity dimension of each individual module.
3Productivity
If a single K×M output switch module is used, then the structure is simple, but the data read bandwidth is limited
Solution Approach 1:
The patent divides the single K×M output switch module into multiple smaller modules (first K1×M and second K2×M output switch modules). Each module can simultaneously read data from its assigned buffer areas, thereby increasing the overall data read bandwidth. The segmentation allows parallel data retrieval operations that would be impossible with a single module, directly improving bandwidth while distributing the complexity across multiple simpler units.
Solution Approach 2:
The patent combines multiple output switch modules to work together as a unified system. The first and second output switch modules operate in parallel, each handling specific buffer areas, and their combined output provides increased data read bandwidth. This merging approach achieves higher bandwidth performance while keeping individual module complexity low.
Data Source
AI summary
A data processing apparatus includes N apparatus input ends, an input switch, K buffer areas, a first output switch, a second output switch, and M apparatus output ends. N input ends of the input switch are coupled to the N apparatus input ends, and K output ends of the input switch correspond to the K buffer areas. K1 input ends of the first output switch correspond to K1 buffer areas in the K buffer areas, and M output ends of the first output switch are coupled to the M apparatus output ends. K2 input ends of the second output switch correspond to K2 buffer areas in the K buffer areas except the K1 buffer areas, and M output ends of the second output switch are coupled to the M apparatus output ends.