Data Reordering for Cache Performance

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing software linking processes do not optimize the arrangement of data variables in a computer program, leading to suboptimal processor cache performance and increased cache misses, which impede run-time efficiency.

Innovation Solution

A method to reorder data variables in a computer program by reassigning virtual addresses based on annotation and profile information, grouping variables by access frequency, and ensuring temporal locality to minimize cache misses, implemented through a linker or post-linking tool that generates an optimized binary file.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the linker simply concatenates data sections of object code modules and assigns virtual addresses, then the linking process is simple and fast, but the data variable arrangement is suboptimal leading to high cache miss ratio

Engineering Contradiction:
Improvelinking speedVSAvoidcache hit ratio
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by performing data reordering at link-time before the program executes. The linker analyzes all object modules globally and rearranges data variables in advance to optimize cache performance, so that when the program runs, the data is already optimally positioned without requiring runtime adjustments.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the virtual address parameters of data variables to achieve optimal cache placement. By modifying the address assignment parameters during linking, the system can control which data variables are placed in which cache lines, thereby improving the cache hit ratio without changing the physical hardware or cache structure.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If compilers order data variables within an object code module optimally, then local cache performance improves, but global optimization across multiple modules cannot be achieved

Engineering Contradiction:
Improvelocal cache performanceVSAvoidglobal optimization capability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent merges the optimization scope by combining local compiler-level data ordering with global linker-level data ordering. The linker takes all object modules and performs a unified data arrangement that considers interactions across module boundaries, effectively merging local optimizations into a global optimization strategy.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The linker is given multi-functionality: it not only performs traditional linking tasks but also performs global data optimization across all object modules. This universal approach allows the same tool to handle both module integration and cross-module cache optimization, achieving versatility that neither compiler nor traditional linker alone could provide.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If users manually create mapfiles to instruct linker placement of data sections, then some cache optimization can be achieved, but the process is extremely tedious and requires expert knowledge

Engineering Contradiction:
Improvecache optimizationVSAvoidoptimization process complexity
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The linker performs self-service by automatically analyzing object modules and determining optimal data arrangements without requiring user intervention. The system uses profile information and automated analysis to make intelligent placement decisions, freeing users from the tedious manual mapfile creation process while maintaining or improving optimization quality.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent employs feedback mechanisms by using profile information collected during program execution or analysis to guide the data reordering process. The linker uses this feedback about actual data access patterns to make informed decisions about data placement, creating a closed-loop optimization system that adapts to real program behavior rather than relying on manual guesses.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS7784042B1Data reordering for improved cache operation
Publication Date: 2010.08.24 ORACLE AMERICAN INC
  • US7784042B1 patent drawing
  • US7784042B1 patent drawing
  • US7784042B1 patent drawing

AI summary

Techniques for reordering the data section of a computer program are provided for improving the run-time performance of the program. A computer program that comprises a data section and a code section is compiled. After the computer program has been compiled, the data section of the computer program is reordered based at least on annotation information that is included in a plurality of object files that represent the object code of the program. A specific binary file that is a specific executable version of the computer program is generated. The specific binary file includes the data section of the computer program that has been reordered. The data section of the computer program may be reordered during the linking of the plurality of the object files. Alternatively, the data section may be reordered after the computer program has been linked into a first binary file by rewriting the first binary file into the specific binary file.