Data Reordering via Counters and Adders
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Solution Overview
Problem
Current data transformation methods, such as FFT, result in transformed data that is not in monotonic order, requiring reordering for further use, especially in communication systems like 3GPP LTE, which can be inefficient due to the large look-up tables needed for reordering, especially with multiple FFT sizes.
Innovation Solution
A data reordering system using a plurality of counters to determine offset addresses for transformed data, allowing for efficient reordering by adding a base address and bit reversing to achieve a monotonically increasing order, reducing the need for large look-up tables.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a Look Up table (LUT) is used for reordering transformed data, then the reordering can be achieved, but the device complexity and memory requirements increase significantly due to the large number of entries needed
Solution Approach 1:
The patent segments the reordering process by dividing the LUT into multiple smaller sub-LUTs, where each sub-LUT handles a specific portion of the reordering task. This segmentation reduces the memory footprint of each individual LUT while maintaining the overall reordering capability through coordinated access to multiple sub-LUTs.
Solution Approach 2:
The patent introduces a new dimension to the reordering approach by using multiple LUTs accessed through different indexing mechanisms. Instead of relying on a single large LUT, the system uses multiple smaller LUTs that can be accessed in combination, effectively distributing the reordering function across multiple dimensions of memory access.
2Adaptability or versatility
If a large Look Up table is used to support multiple FFT sizes, then all reordering operations can be performed, but the memory usage and processing overhead increase
Solution Approach 1:
The patent segments the LUT into multiple smaller sub-LUTs, each optimized for specific FFT size ranges. This allows the system to support multiple FFT sizes while using less total memory, as each sub-LUT can be independently sized and configured for its specific purpose rather than requiring one large universal LUT.
Solution Approach 2:
The patent creates a universal reordering system where multiple smaller LUTs work together to handle various FFT sizes. Each sub-LUT is designed to be multi-functional, capable of handling different FFT configurations within its scope, and the collection of sub-LUTs provides universal support across all required FFT sizes.
3Productivity
If data is reordered using traditional methods, then the transformed data can be used for further processing, but the processing time and computational resources increase
Solution Approach 1:
The patent applies preliminary action by pre-computing and storing reordering mappings in the LUTs before actual data processing occurs. This allows the reordering operation to be performed efficiently during data processing by simply looking up pre-computed values, rather than performing complex calculations in real-time, thus reducing processing time and increasing throughput.
Data Source
AI summary
A data reordering system for determining addresses associated with a vector of transformed data and corresponding method of reordering transformed data, where the data reordering system includes: a first transform function coupled to a data vector and operable to provide the vector of transformed data; a reordering function, including a plurality of counters, that is operable to determine a plurality of offset addresses, with a, respective, offset address for each element in the vector of transformed data; and an adder operable to add a base address that corresponds to the first address to the each, respective, offset address to provide a sequence of addresses suitable for accessing the vector of transformed data to provide a re-sequenced vector of transformed data.