Data Retention Flop Using a Dual-Function Slave Latch

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Solution Overview

Problem

Conventional data retention flops require large die area, increased circuit elements, complex control signals, and higher power consumption due to the need for a third latch, making them inefficient in terms of area and power usage, especially in power-down modes.

Innovation Solution

A small area low power data retention flop design that uses a master latch and a data retention latch configured as a slave to the master latch, with a single control input to switch between normal operation and low power retention mode, eliminating the need for a third latch and reducing power consumption by powering down the master latch while the slave latch retains the value.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a third latch is added to implement data retention flop, then data retention capability is improved, but die area increases

Engineering Contradiction:

Improvedata retention capabilityVSAvoiddie area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The existing slave latch is made multi-functional by configuring it to perform both its traditional slave function during normal operation and a data retention function during power-down mode. This is achieved through control signals that reconfigure the latch's behavior, allowing one latch to serve dual purposes and eliminating the need for a dedicated third retention latch.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The data retention function is merged with the existing slave latch rather than being implemented as a separate component. The slave latch is enhanced with additional control logic that enables it to hold data during power-down sequences, combining the retention function with the existing latch structure to save die area.

Inventive Principle:

Principle #5Merging (Combining)

2Reliability

If a third latch is added to implement data retention flop, then data retention capability is improved, but power consumption increases

Engineering Contradiction:

Improvedata retention capabilityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The slave latch is configured to perform multiple functions including both slave operation and data retention. During power-down mode, the latch transitions to retention mode where it holds data using minimal power, eliminating the need for a third latch that would continuously consume power even in standby.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The circuit discards the third latch component entirely, recovering die area and reducing power consumption. The retention function is achieved by reconfiguring existing latch elements rather than adding dedicated retention hardware that would consume additional power.

Inventive Principle:

Principle #34Discarding and recovering

3Reliability

If a third latch is added to implement data retention flop, then data retention capability is improved, but device complexity increases

Engineering Contradiction:

Improvedata retention capabilityVSAvoidcircuit complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The slave latch is enhanced with control logic that enables it to switch between slave mode and retention mode based on control signals. This multi-functionality allows the existing latch to handle both operational modes without requiring additional dedicated retention latch circuits, thereby maintaining simpler overall device architecture.

Inventive Principle:

Principle #6Universality (Multi-functionality)

4Reliability

If a third latch is added to implement data retention flop, then data retention capability is improved, but the number of circuit elements increases

Engineering Contradiction:

Improvedata retention capabilityVSAvoidnumber of circuit elements

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

The slave latch is configured to perform dual functions as both a slave latch during normal operation and a data retention latch during power-down mode. This eliminates the need for a third dedicated retention latch, reducing the total number of circuit elements while maintaining data retention capability.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS8988123B2Small area low power data retention flop

Publication Date: 2015.03.24 NVIDIA CORP

AI summary

Small area low power data retention flop. In accordance with a first embodiment of the present invention, a circuit includes a master latch coupled to a data retention latch. The data retention latch is configured to operate as a slave latch to the master latch to implement a master-slave flip flop during normal operation. The data retention latch is configured to retain an output value of the master-slave flip flop during a low power data retention mode when the master latch is powered down. A single control input is configured to select between the normal operation and the low power data retention mode. The circuit may be independent of a third latch.