Data Sequencing Circuit with Alternating Bit Order for Lower Toggle Rates
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Solution Overview
Problem
Existing data sequencing methods in memory arrays lead to high signal toggling rates and increased power consumption, particularly in computing-in-memory operations where consecutive data elements often have the same-valued most significant bits or least significant bits.
Innovation Solution
A data sequencing circuit that transmits bits of data elements in alternating sequence order, ensuring adjacent bits of consecutively transmitted data elements are either most significant bits (MSBs) or least significant bits (LSBs), thereby reducing signal toggling rates and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If data bits are transmitted in conventional sequence order, then data processing can be performed, but signal toggling rates increase and power consumption increases
Solution Approach 1:
The patent applies dynamics by making the data bit transmission sequence adaptive rather than fixed. The sequencing circuit dynamically adjusts the transmission order of data bits based on the actual data values being processed. When consecutive data elements have the same-valued MSBs or LSBs, the circuit alternates the transmission sequence to reduce signal toggling, thereby reducing power consumption while maintaining processing productivity.
Solution Approach 2:
The patent changes the parameter of transmission sequence order from a static convention to a dynamic variable. By altering the sequence in which data bits are transmitted based on data characteristics (specifically when MSBs or LSBs have the same value), the system optimizes signal toggling behavior. This parameter change directly reduces the number of signal transitions, leading to lower power consumption without sacrificing computational throughput.
2Use of energy by moving object
If data bits are transmitted in alternating sequence order, then signal toggling rates reduce and power consumption reduces, but device complexity increases
Solution Approach 1:
The patent introduces an intermediary component - the sequencing circuit - that sits between the data source and the processing units. This intermediary device automatically manages the complex task of determining optimal transmission sequences without requiring the main processing circuitry to be complicated. The sequencing circuit acts as a mediator that handles the complexity of sequence management, allowing the rest of the system to remain relatively simple while still achieving reduced power consumption through intelligent data bit sequencing.
Data Source
AI summary
A circuit includes a data register configured to receive and output successive data elements of a plurality of data elements responsive to a clock signal, wherein each data element of the plurality of data elements includes a total number of bits N. A signal generation portion is configured to output a first selection signal responsive to the clock signal, the first selection signal includes two alternating sequences, values of the first sequence increment from zero to N−1, and values of the second sequence decrement from N−1 to zero. A selection circuit coupled to the data register is configured to output the N bits of each data element of the plurality of data elements in a first sequential order responsive to the first sequence of the first selection signal, and in a second sequential order opposite the first sequential order responsive to the second sequence of the first selection signal.