Data Serializer Clock Alignment for Low-Jitter NAND Output
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Solution Overview
Problem
As data output rates increase, the timing of serializing data in NAND flash memory becomes critical, and existing data serializers face challenges in maintaining accurate synchronization and reducing jitter in the serialization process.
Innovation Solution
The implementation of a data serializer that uses a (Y+1):2 multiplexer configuration, with clock signals shifted in phase to align data transitions, and tri-state inverters to manage clock signal logic levels, effectively reducing jitter by limiting data paths and synchronizing data output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data output rate is increased, then productivity is improved, but timing accuracy and jitter control deteriorate
Solution Approach 1:
The patent divides the parallel data output into multiple serial data streams using separate serializers for each data line. Each serializer independently handles timing for its assigned data line, segmenting the timing control function to maintain accuracy at higher output rates
Solution Approach 2:
The patent implements preliminary synchronization by aligning data transitions with clock signal transitions before serialization begins. This preliminary timing alignment ensures that data is ready and synchronized before the high-speed serial output commences, maintaining timing accuracy
2Productivity
If data output rate is increased, then productivity is improved, but device complexity increases
Solution Approach 1:
The patent merges multiple data lines into a single serialized output stream through systematic multiplexing. By combining the serialization function across multiple parallel data lines into a unified output protocol, the overall system complexity is managed while achieving high data output rates
Solution Approach 2:
The patent employs periodic clock signals to control the serialization process, using regular clock cycles to systematically multiplex multiple data lines onto a single output. This periodic control simplifies the timing logic compared to asynchronous approaches
Data Source
AI summary
Methods for serializing data output including receiving a plurality of data values, sequentially providing data values representative of data values of a first subset of data values of the plurality of data values to a first signal line while sequentially providing data values representative of data values of a second subset of data values of the plurality of data values to a second signal line, and providing data values representative of the sequentially-provided data values from the first signal line and providing data values representative of the sequentially-provided data values from the second signal line in an alternating manner to a third signal line, as well as apparatus having a configuration to support such methods.