Data Swizzling for Multi-Bit Error Detection in Memory Systems

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Solution Overview

Problem

Conventional error correction codes, such as SECDED, often fail to detect or correctly correct multi-bit errors in memory storage, leading to data corruption or misreporting of errors, especially in cases of byte-mode failures where entire bytes are returned as all '0's or all '1's.

Innovation Solution

The implementation of a data swizzling technique that rearranges and distributes data and error correction bits across multiple codewords, using methods like vertical, horizontal, or diagonal swizzling, to create swizzled codewords, which allows for improved error detection and correction without altering existing error correcting code generators and checkers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional SECDED error correction code is used, then single-bit errors can be corrected and double-bit errors can be detected, but multi-bit errors (greater than two bits) cannot be detected or corrected, leading to data corruption

Engineering Contradiction:
Improveerror detection and correction capabilityVSAvoiderror correction code structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the error correction problem by dividing the codeword into multiple portions and applying different error correction codes to different portions. Specifically, it uses SECDED for some portions and a different error correction code with higher multi-bit error detection capability for other portions, thereby improving overall reliability without requiring a complete redesign of the error correction system

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by using different error correction capabilities for different portions of the data. Critical portions that are more susceptible to multi-bit errors receive enhanced error correction protection, while less critical portions use standard SECDED, optimizing the balance between reliability and complexity

Inventive Principle:
Principle #3Local quality

2Reliability

If error correction bits are added to protect against multi-bit errors, then detection capability improves, but the number of bits required per codeword increases

Engineering Contradiction:
Improvemulti-bit error detection capabilityVSAvoidnumber of error correction bits
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent segments the error correction bits into different groups, each associated with different portions of the data. This allows the system to use more robust error correction codes for specific critical portions without requiring all data to use the same high-overhead code, thereby improving multi-bit error detection while controlling the overall number of error correction bits

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by using enhanced error correction only for specific portions of the data where multi-bit errors are most likely to occur or where error protection is most critical. This selective approach provides improved multi-bit error detection capability without the excessive overhead of applying strong error correction to all data uniformly

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11789811B2Techniques for storing data to enhance recovery and detection of data corruption errors
Publication Date: 2023.10.17 NVIDIA CORP
  • US11789811B2 patent drawing
  • US11789811B2 patent drawing
  • US11789811B2 patent drawing

AI summary

Often there are errors when reading data from computer memory. To detect and correct these errors, there are multiple types of error correction codes. Disclosed is an error correction architecture that creates a codeword having a data portion and an error correction code portion. Swizzling rearranges the order of bits and distributes the bits among different codewords. Because the data is redistributed, a potential memory error of up to N contiguous bits, where N for example equals 2 times the number of codewords swizzled together, only affects up to, at most, two bits per swizzled codeword. This keeps the error within the error detecting capabilities of the error correction architecture. Furthermore, this can allow improved error correction and detection without requiring a change to error correcting code generators and checkers.