Data Tiering in Heterogeneous Memory Systems

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Solution Overview

Problem

In heterogeneous memory systems, allocating frequently accessed data to low-speed but high-capacity memory can lead to performance degradation compared to single memory systems, necessitating a solution to maintain performance across various applications.

Innovation Solution

Implementing a data tiering system that identifies frequently accessed addresses through memory access tracking and classification, allocating high-speed memory for frequently accessed data and low-speed but high-capacity memory for normal data, thereby optimizing memory allocation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If frequently accessed data is allocated to low-speed but high-capacity memory, then storage capacity is improved, but memory access speed deteriorates

Engineering Contradiction:
Improvestorage capacityVSAvoidmemory access speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The memory system is segmented into multiple memory types (e.g., DRAM, SRAM, Flash) with different speed and capacity characteristics. Frequently accessed data is allocated to high-speed memory segments, while less frequently accessed data is stored in high-capacity low-speed memory segments, resolving the contradiction between capacity and speed through spatial segmentation of data based on access patterns.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically monitors memory access patterns and reconfigures data allocation between different memory types based on observed usage. Data that becomes frequently accessed is migrated from low-speed to high-speed memory, and vice versa, making the memory allocation dynamic rather than static to adapt to changing access patterns.

Inventive Principle:
Principle #15Dynamics

2Speed

If data is allocated based on access frequency, then memory access speed is improved, but system complexity increases

Engineering Contradiction:
Improvememory access speedVSAvoidmemory management complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The system implements self-service mechanisms where the memory management subsystem automatically monitors access patterns, identifies frequently accessed data, and performs allocation or migration decisions without external intervention. This automated self-management reduces the operational complexity for users while maintaining performance benefits.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The memory management system continuously monitors memory access patterns and uses this feedback to dynamically adjust data allocation. The feedback loop tracks access frequency, identifies performance bottlenecks, and triggers reallocation decisions, creating a closed-loop control system that adapts to actual usage patterns while managing complexity through automated decision-making.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11656979B2Data tiering in heterogeneous memory system
Publication Date: 2023.05.23 SK HYNIX INC
  • US11656979B2 patent drawing
  • US11656979B2 patent drawing
  • US11656979B2 patent drawing

AI summary

A heterogeneous memory system includes a memory device including first and second memories and a controller including a cache. The controller identifies memory access addresses among addresses for memory regions of the memory device; track, for a set period, a number of memory accesses for each memory access address; classify each memory access address into a frequently accessed address or a normal accessed address based on the number of memory accesses in the set period; and allocate the first memory for frequently accessed data associated with the frequently accessed address and the second memory for normal data associated with the normal accessed address.