Data Transfer Apparatus Optimizing Packet Efficiency

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Solution Overview

Problem

Data transfer efficiency is impaired due to the inclusion of invalid data and increased headers in packet-based systems, particularly when transitioning from parallel buses to PCI-Express, and the high amount of byte enable data in serial bus transfers.

Innovation Solution

A data transfer apparatus and method that generates data enable characters in units of 64 bits, reducing the need for headers and improving transfer efficiency by identifying and omitting invalid data, thereby optimizing packet configuration and reducing the number of cycles required for data transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is transferred using packet basis with byte enables attached to each byte, then invalid data transfer is suppressed, but the high amount of byte enable data impairs transfer efficiency

Engineering Contradiction:
Improvedata transfer accuracyVSAvoidtransfer efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The data transfer is segmented into valid and invalid portions using validity information. Instead of treating all data bytes equally, the system divides the data stream and only transfers segments marked as valid, eliminating the need to transmit validity information for every single byte while maintaining accurate data transfer.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by transmitting only the necessary portion of data (valid data segments) rather than complete data units. Validity information is used to identify and transmit only the required data portions, reducing overall transmission volume while ensuring data integrity.

Inventive Principle:
Principle #16Partial or excessive action

2Reliability

If data containing invalid bytes is transferred to PCI-Express, then the protocol handles data except head and tail portions as valid, but the transfer is divided at invalid data positions requiring additional headers

Engineering Contradiction:
Improvedata validity handlingVSAvoidpacket structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Invalid data bytes are extracted and removed from the data transfer stream before transmission to PCI-Express. By taking out only the valid data portions and excluding invalid bytes entirely, the system eliminates the need for complex packet division and header addition that would otherwise be required to handle invalid data positions.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The data is pre-processed to remove or mark invalid bytes before transmission begins. This preliminary action of filtering out invalid data prevents the need for complex runtime handling and packet restructuring at the PCI-Express interface, simplifying the overall transfer process.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If data is divided into multiple transfers with headers added, then invalid data is properly handled, but the division and increased headers occupy transfer bandwidth reducing efficiency

Engineering Contradiction:
Improvedata transfer integrityVSAvoidbandwidth utilization
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

Multiple data bytes are merged into continuous valid data segments for transmission. By combining adjacent valid bytes into larger transfer units and eliminating invalid bytes in between, the system reduces the number of separate transfers required and minimizes header overhead, thereby improving bandwidth utilization while maintaining data integrity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP2523118B1Data transfer apparatus and data transfer method
Publication Date: 2015.04.08 CANON KK
  • EP2523118B1 patent drawingFigure 1
  • EP2523118B1 patent drawingFigure 2
  • EP2523118B1 patent drawingFigure 3A~3B

AI summary

A packet accompanying data valid information is transferred at high efficiency within an integrated circuit or between integrated circuits. A character indicating data enable information is provided and an identifier indicating a data enable character is assigned onto the packet. When the data enable information is valid in series, the data enable characters are eliminated from the packet to be transferred.