Data Transfer Circuit Power Reduction in Nonvolatile Memory
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Solution Overview
Problem
Nonvolatile memory devices face challenges in reducing power consumption, particularly due to high power consumption by signal lines transferring data.
Innovation Solution
A data transfer circuit in a nonvolatile memory device is designed with a plurality of first and second repeaters and signal lines, where the repeaters are activated in specific operation modes and the signal lines are alternately arranged and floated in response to power gating signals to reduce capacitance and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If signal lines are continuously active to transfer data, then data transfer capability is improved, but power consumption increases
Solution Approach 1:
The signal lines are dynamically controlled to be activated only when needed for data transfer and floated (deactivated) when not in use. The repeaters switch between active and floating states based on operation mode, making the signal lines dynamic rather than continuously active, thus reducing capacitance and power consumption while maintaining data transfer capability when required
Solution Approach 2:
The signal lines are activated periodically only during specific operation modes (first operation mode or second operation mode) and floated during other periods. This periodic activation pattern ensures data transfer capability is available when needed while minimizing power consumption during idle periods
2Speed
If multiple signal lines are activated simultaneously, then data transfer speed is improved, but power consumption increases
Solution Approach 1:
The signal lines are divided into two separate groups (first group and second group) that are activated alternately based on operation mode. This segmentation allows the system to activate only one group at a time, reducing the number of simultaneously active signal lines and thus lowering power consumption while maintaining data transfer speed through the active group
Solution Approach 2:
The two groups of signal lines are activated in alternating periods corresponding to different operation modes. During the first operation mode, the first group is active; during the second operation mode, the second group is active. This periodic alternation ensures data transfer capability is maintained while reducing overall power consumption
Data Source
AI summary
A data transfer circuit in a nonvolatile memory device includes first repeaters, second repeaters and signal lines. The signal lines connect the first repeaters and the second repeaters, and include a first group of signal lines and a second group of signal lines alternatingly arranged. The first repeaters include a first group of repeaters activated in a first operation mode and a second group of repeaters activated in a second operation mode. The second repeaters include a third group of repeaters activated in the first operation mode and are connected to the first group of repeaters through the first group of signal lines floated in the second operation mode, and a fourth group of repeaters activated in the second operation mode and are connected to the second group of repeaters through the second group of signal lines floated in the first operation mode.