Data Transfer Circuit with Segmented Driving Units
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Solution Overview
Problem
In non-volatile memory systems, the global data input and output lines are heavily loaded due to the low drivability of the cache latch, which hampers data transfer speed during read operations.
Innovation Solution
The solution involves separating the global data input and output lines and using an added driving unit to drive the global output line based on the data stored in the page buffer, allowing for faster data transfer by utilizing multiple driving units and connection units to couple the lines accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the cache latch drives the global data output line directly, then the device structure remains simple, but the data transfer speed is reduced due to heavy loading and low drivability
Solution Approach 1:
The patent divides the global data output line into multiple segments, each driven by a separate driving unit. Instead of having a single cache latch drive the entire global line, multiple driving units are distributed along the global line to provide localized driving capability, reducing the loading burden on each individual driver and improving overall data transfer speed.
Solution Approach 2:
The patent introduces connection units as intermediary components between the cache latch and the global data output line. These connection units selectively couple the cache latch to specific segments of the global line, enabling controlled data transfer and reducing the direct loading burden on the cache latch while maintaining structural organization.
2Productivity
If multiple driving units are added to drive the global output line, then the data transfer speed increases, but the device complexity increases
Solution Approach 1:
The driving units and connection units in the patent are designed to perform multiple functions. The driving units not only drive the global data output line but also can be selectively coupled to different cache latches through the connection units. The connection units serve both as switches for selecting which cache latch connects to which global line segment and as part of the data transfer path, reducing the need for separate dedicated components for each function.
Data Source
AI summary
A data transfer circuit includes a plurality of first lines, a second line suitable for receiving data from a first line selected among the first lines, a third line suitable for transferring data to the first line selected among the first lines, a plurality of driving units, each suitable for driving the second line based on the data from the corresponding first line in a first operation, and a plurality of connection units, each suitable for coupling the third line to the corresponding first line when the corresponding first line is selected in a second operation.