Data Transfer Module Voting Scheme for Race Condition Resolution
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Solution Overview
Problem
Conventional solutions for addressing race conditions in implantable medical devices (IMDs) result in increased circuit complexity, latency, and current drain, which hinder the miniaturization and power efficiency of these devices, especially as they strive for higher clocking speeds.
Innovation Solution
A voting scheme is implemented in a data transfer module to sample data at a defined active edge of a faster clock signal, obtaining multiple samples within a sampling window based on the interval between active edges of a slower clock signal, ensuring accurate data transfer while maintaining operation of both faster and slower clocked circuitry during data transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional solutions (such as clock skewing or disabling higher frequency clock) are used to address race conditions, then data transfer accuracy is improved, but device complexity, latency, and current drain increase
Solution Approach 1:
A data transfer module is introduced as an intermediary component between the first component (clocked at first frequency) and the second component (clocked at second frequency). This module samples the data signal multiple times within a sampling window and uses a voting scheme to determine the valid data value, thereby mediating the data transfer between differently clocked circuits without requiring complex clock synchronization or disabling operations.
Solution Approach 2:
The data transfer process is segmented into multiple sampling operations within a defined sampling window. Instead of a single data read operation, the system performs multiple samples and combines them through a voting scheme, dividing the transfer task into discrete sampling steps that reduce the impact of race conditions.
2Reliability
If conventional solutions (such as clock skewing or disabling higher frequency clock) are used to address race conditions, then data transfer accuracy is improved, but current drain increases
Solution Approach 1:
The data transfer module serves as an energy-efficient intermediary by enabling continuous operation of both clock signals without requiring the higher frequency clock to be disabled during data transfers. The multiple sampling approach with voting logic consumes less power than conventional methods that require clock disabling or complex synchronization mechanisms.
3Reliability
If conventional solutions (such as clock skewing or disabling higher frequency clock) are used to address race conditions, then data transfer accuracy is improved, but latency increases
Solution Approach 1:
The system performs preliminary actions by continuously sampling the data signal multiple times within the sampling window before the actual data transfer is completed. The voting scheme determines the valid data value in advance, allowing the first component to proceed with data processing without waiting for complex clock synchronization or disabling operations.
4Productivity
If higher clocking speeds are used to improve processing capabilities, then productivity is improved, but race conditions become more pronounced
Solution Approach 1:
The voting scheme implements a feedback mechanism where multiple samples of the data signal are taken and compared. The valid data value is determined based on the voting result of these samples, providing feedback that ensures accurate data transfer even at higher clocking speeds where race conditions are more likely to occur.
Data Source
AI summary
The accuracy of data processing operations in an electronic device is improved through reductions in errors associated with data acquisition, reading, and transmission. In one embodiment, two or more modules of an integrated circuit are operated at different clock speeds and a voting scheme is utilized to obtain a valid data value from one of the modules. The disclosure describes methods, devices and systems that utilize the voting schemes to eliminate errors induced by race conditions in obtaining valid data values during data transfer by obtaining a plurality of data samples while the communicating modules are operating at the different clock speeds and selecting from among the data samples the valid data value.