Data Transfer Circuit Using Multiplexer Segmentation for High-Speed SerDes
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Solution Overview
Problem
High-bandwidth data transmission within integrated circuits faces challenges such as signal dissipation and synchronizing clock signals across distant components, leading to inadequate performance and high error rates in traditional SerDes circuits.
Innovation Solution
A digital SerDes circuit employing numerical digital processing techniques, including a 2-tap feed-forward equalizer and 5-tap decision feedback equalizer, along with a data marshalling circuit and multiplexer to manage data transmission and reception, providing pre-compensation and equalization to combat channel impairments and ISI.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional SerDes circuits are used for high-bandwidth data transmission, then data transmission capability is provided, but signal dissipation occurs and clock synchronization becomes difficult across distant components
Solution Approach 1:
The patent divides the data transmission system into multiple segments: data marshalling circuit that organizes data into groups, multiple conductor groups for parallel transmission, and a multiplexer that selectively activates different conductor groups. This segmentation allows the signal to be transmitted in manageable segments rather than as a single continuous signal, reducing dissipation effects over distance
Solution Approach 2:
The patent introduces an intermediary multiplexer device that sits between the data source and transmission medium. This multiplexer acts as a mediator that cycles through different conductor groups, selecting which group receives data at any given time. This intermediary approach allows distant components to be synchronized through the multiplexer's controlled switching rather than requiring direct clock signal distribution across all components
2Speed
If data is transmitted at very high rates, then bandwidth is improved, but signal dissipation increases and clock synchronization becomes inadequate
Solution Approach 1:
The patent employs periodic action through the multiplexer, which cyclically switches between different conductor groups at a controlled rate. This periodic switching allows data to be transmitted in bursts through different physical paths, preventing continuous signal dissipation in a single conductor group and allowing time for signal recovery and regeneration
Solution Approach 2:
The patent transitions from single-conductor serial transmission to multi-conductor parallel transmission by introducing spatial dimensionality. Multiple conductor groups provide multiple physical dimensions for signal transmission, allowing the system to achieve high data rates by utilizing parallel paths rather than increasing the rate on a single path, thereby reducing signal dissipation per conductor
3Device complexity
If the same clock signal is used to time distant circuit parts, then circuit simplicity is maintained, but synchronization accuracy deteriorates
Solution Approach 1:
The patent applies preliminary action by having the data marshalling circuit organize and prepare data into groups before transmission, and by having the multiplexer pre-select which conductor groups will be active. This preliminary organization allows the system to maintain simple clock distribution while achieving accurate synchronization, as the data is already structured and ready for timed transmission without requiring complex real-time adjustments
Data Source
AI summary
A data transfer circuit is provided for sending digital data at high rates across short but significant distances within an integrated circuit. The data is sent on parallel conductors that are divided into a number of groups. At the receiving end, a multiplexer selects each of the groups in turn and presents them at a set of conductors that are the same in number as one of the groups. At the transmitting end, a data marshalling circuit takes the bitstream to be transmitted and places it on the conductors in a particular redundant fashion so that the bitstream appears to advance across the set of outputs of the multiplexer. That is particularly useful where those outputs are presented to a pre-emphasis filter and line driver. The apparent data rate can be changed by making two or more of the groups of conductors have identical data.